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Message-ID: <a62c8f0f-db3d-41da-b2a8-a064f0feba32@suswa.mountain>
Date: Thu, 7 Dec 2023 08:41:09 +0300
From: Dan Carpenter <dan.carpenter@...aro.org>
To: oe-kbuild@...ts.linux.dev, baneric926@...il.com, jdelvare@...e.com,
linux@...ck-us.net, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
corbet@....net
Cc: lkp@...el.com, oe-kbuild-all@...ts.linux.dev,
linux-hwmon@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-doc@...r.kernel.org,
openbmc@...ts.ozlabs.org, kwliu@...oton.com, kcfeng0@...oton.com,
DELPHINE_CHIU@...ynn.com, Bonnie_Lo@...ynn.com
Subject: Re: [PATCH v1 2/2] hwmon: Driver for Nuvoton NCT736X
Hi,
kernel test robot noticed the following build warnings:
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/baneric926-gmail-com/dt-bindings-hwmon-Add-nct736x-bindings/20231204-135942
base: linus/master
patch link: https://lore.kernel.org/r/20231204055650.788388-3-kcfeng0%40nuvoton.com
patch subject: [PATCH v1 2/2] hwmon: Driver for Nuvoton NCT736X
config: m68k-randconfig-r071-20231207 (https://download.01.org/0day-ci/archive/20231207/202312071152.Kfcw1KlD-lkp@intel.com/config)
compiler: m68k-linux-gcc (GCC) 13.2.0
reproduce: (https://download.01.org/0day-ci/archive/20231207/202312071152.Kfcw1KlD-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@...el.com>
| Reported-by: Dan Carpenter <dan.carpenter@...aro.org>
| Closes: https://lore.kernel.org/r/202312071152.Kfcw1KlD-lkp@intel.com/
smatch warnings:
drivers/hwmon/nct736x.c:367 nct736x_init_chip() error: uninitialized symbol 'gpio0_3'.
drivers/hwmon/nct736x.c:370 nct736x_init_chip() error: uninitialized symbol 'gpio4_7'.
drivers/hwmon/nct736x.c:373 nct736x_init_chip() error: uninitialized symbol 'gpio10_13'.
drivers/hwmon/nct736x.c:376 nct736x_init_chip() error: uninitialized symbol 'gpio14_17'.
vim +/gpio0_3 +367 drivers/hwmon/nct736x.c
16e62bcf3c9b93 Ban Feng 2023-12-04 335 static int nct736x_init_chip(struct i2c_client *client,
16e62bcf3c9b93 Ban Feng 2023-12-04 336 u32 pwm_mask, u32 fanin_mask, u32 wdt_cfg)
16e62bcf3c9b93 Ban Feng 2023-12-04 337 {
16e62bcf3c9b93 Ban Feng 2023-12-04 338 const struct i2c_device_id *id = i2c_match_id(nct736x_id, client);
16e62bcf3c9b93 Ban Feng 2023-12-04 339 u8 i, gpio0_3, gpio4_7, gpio10_13, gpio14_17;
16e62bcf3c9b93 Ban Feng 2023-12-04 340 int ret;
16e62bcf3c9b93 Ban Feng 2023-12-04 341
16e62bcf3c9b93 Ban Feng 2023-12-04 342 for (i = 0; i < NCT736X_PWM_COUNT; i++) {
16e62bcf3c9b93 Ban Feng 2023-12-04 343 if (i < 4) {
16e62bcf3c9b93 Ban Feng 2023-12-04 344 if (pwm_mask & BIT_CHECK(i))
16e62bcf3c9b93 Ban Feng 2023-12-04 345 gpio0_3 |= PWM_SEL(i);
This doesn't work. gpio0_3 needs to be initialized to zero before we
can turn on individual bits.
16e62bcf3c9b93 Ban Feng 2023-12-04 346 if (fanin_mask & BIT_CHECK(i))
16e62bcf3c9b93 Ban Feng 2023-12-04 347 gpio10_13 |= FANIN_SEL(i);
Etc...
16e62bcf3c9b93 Ban Feng 2023-12-04 348 } else if (i < 8) {
16e62bcf3c9b93 Ban Feng 2023-12-04 349 if (pwm_mask & BIT_CHECK(i))
16e62bcf3c9b93 Ban Feng 2023-12-04 350 gpio4_7 |= PWM_SEL(i);
16e62bcf3c9b93 Ban Feng 2023-12-04 351 if (fanin_mask & BIT_CHECK(i))
16e62bcf3c9b93 Ban Feng 2023-12-04 352 gpio14_17 |= FANIN_SEL(i);
16e62bcf3c9b93 Ban Feng 2023-12-04 353 } else if (i < 12) {
16e62bcf3c9b93 Ban Feng 2023-12-04 354 if (pwm_mask & BIT_CHECK(i))
16e62bcf3c9b93 Ban Feng 2023-12-04 355 gpio10_13 |= PWM_SEL(i);
16e62bcf3c9b93 Ban Feng 2023-12-04 356 if (fanin_mask & BIT_CHECK(i))
16e62bcf3c9b93 Ban Feng 2023-12-04 357 gpio0_3 |= FANIN_SEL(i);
16e62bcf3c9b93 Ban Feng 2023-12-04 358 } else {
16e62bcf3c9b93 Ban Feng 2023-12-04 359 if (pwm_mask & BIT_CHECK(i))
16e62bcf3c9b93 Ban Feng 2023-12-04 360 gpio14_17 |= PWM_SEL(i);
16e62bcf3c9b93 Ban Feng 2023-12-04 361 if (fanin_mask & BIT_CHECK(i))
16e62bcf3c9b93 Ban Feng 2023-12-04 362 gpio4_7 |= FANIN_SEL(i);
16e62bcf3c9b93 Ban Feng 2023-12-04 363 }
16e62bcf3c9b93 Ban Feng 2023-12-04 364 }
16e62bcf3c9b93 Ban Feng 2023-12-04 365
16e62bcf3c9b93 Ban Feng 2023-12-04 366 /* Pin Function Configuration */
16e62bcf3c9b93 Ban Feng 2023-12-04 @367 ret = nct736x_write_reg(client, NCT736X_REG_GPIO_0_3, gpio0_3);
^^^^^^^
16e62bcf3c9b93 Ban Feng 2023-12-04 368 if (ret < 0)
16e62bcf3c9b93 Ban Feng 2023-12-04 369 return ret;
16e62bcf3c9b93 Ban Feng 2023-12-04 @370 ret = nct736x_write_reg(client, NCT736X_REG_GPIO_4_7, gpio4_7);
16e62bcf3c9b93 Ban Feng 2023-12-04 371 if (ret < 0)
16e62bcf3c9b93 Ban Feng 2023-12-04 372 return ret;
16e62bcf3c9b93 Ban Feng 2023-12-04 @373 ret = nct736x_write_reg(client, NCT736X_REG_GPIO_10_13, gpio10_13);
16e62bcf3c9b93 Ban Feng 2023-12-04 374 if (ret < 0)
16e62bcf3c9b93 Ban Feng 2023-12-04 375 return ret;
16e62bcf3c9b93 Ban Feng 2023-12-04 @376 ret = nct736x_write_reg(client, NCT736X_REG_GPIO_14_17, gpio14_17);
16e62bcf3c9b93 Ban Feng 2023-12-04 377 if (ret < 0)
16e62bcf3c9b93 Ban Feng 2023-12-04 378 return ret;
16e62bcf3c9b93 Ban Feng 2023-12-04 379
16e62bcf3c9b93 Ban Feng 2023-12-04 380 /* PWM and FANIN Monitoring Enable */
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
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