lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <5d289553a49274c92ce12eb63735cea2f1bf8bf1.camel@mediatek.com>
Date:   Thu, 7 Dec 2023 08:18:56 +0000
From:   Jianjun Wang (王建军) 
        <Jianjun.Wang@...iatek.com>
To:     "helgaas@...nel.org" <helgaas@...nel.org>
CC:     "linux-mediatek@...ts.infradead.org" 
        <linux-mediatek@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Jieyy Yang (杨洁) <Jieyy.Yang@...iatek.com>,
        Chuanjia Liu (柳传嘉) 
        <Chuanjia.Liu@...iatek.com>,
        Jian Yang (杨戬) <Jian.Yang@...iatek.com>,
        Qizhong Cheng (程啟忠) 
        <Qizhong.Cheng@...iatek.com>, "robh@...nel.org" <robh@...nel.org>,
        "kw@...ux.com" <kw@...ux.com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "matthias.bgg@...il.com" <matthias.bgg@...il.com>,
        "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
        "lpieralisi@...nel.org" <lpieralisi@...nel.org>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "angelogioacchino.delregno@...labora.com" 
        <angelogioacchino.delregno@...labora.com>,
        Jianguo Zhang (张建国) 
        <Jianguo.Zhang@...iatek.com>, Ryder Lee <Ryder.Lee@...iatek.com>
Subject: Re: [PATCH 1/2] PCI: mediatek: Allocate MSI address with
 dmam_alloc_coherent

Hi Bjorn,

On Wed, 2023-12-06 at 11:07 -0600, Bjorn Helgaas wrote:
>  On Wed, Dec 06, 2023 at 04:37:52PM +0800, Jianjun Wang wrote:
> > Use 'dmam_alloc_coherent' to allocate the MSI address, instead of
> using
> > 'virt_to_phys'.
> 
> s/'dmam_alloc_coherent'/dmam_alloc_coherent()/
> s/'virt_to_phys'/virt_to_phys()/
> 
> In subject also.
> 
> > @@ -732,8 +740,11 @@ static int mtk_pcie_startup_port_v2(struct
> mtk_pcie_port *port)
> >  val &= ~INTX_MASK;
> >  writel(val, port->base + PCIE_INT_MASK);
> >  
> > -if (IS_ENABLED(CONFIG_PCI_MSI))
> > -mtk_pcie_enable_msi(port);
> > +if (IS_ENABLED(CONFIG_PCI_MSI)) {
> > +err = mtk_pcie_enable_msi(port);
> > +if (err)
> > +return err;
> 
> Is failure to enable MSI a fatal issue?  It looks like this will make
> the host controller completely unusable if we can't set up MSI, even
> if downstream PCI devices could use INTx and get along without MSI.

This shouldn't be a fatal issue, we can still use INTx, I'll fix them
in the next version, thanks for your review.

Thanks.
> 
> Bjorn

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ