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Date:   Thu, 7 Dec 2023 16:23:10 +0800
From:   Guo Ren <guoren@...nel.org>
To:     Drew Fustini <dfustini@...libre.com>
Cc:     Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Jisheng Zhang <jszhang@...nel.org>, Fu Wei <wefu@...hat.com>,
        Conor Dooley <conor@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Jason Kridner <jkridner@...gleboard.org>,
        Robert Nelson <robertcnelson@...gleboard.org>,
        linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org
Subject: Re: [PATCH v8 2/4] riscv: dts: thead: Add TH1520 mmc controllers and
 sdhci clock

On Wed, Dec 6, 2023 at 4:09 PM Drew Fustini <dfustini@...libre.com> wrote:
>
> Add node for the fixed reference clock used for emmc and sdio nodes.
> Add emmc node for the 1st dwcmshc instance which is typically connected
> to an eMMC device. Add sdio0 node for the 2nd dwcmshc instance which is
> typically connected to microSD slot. Add sdio1 node for the 3rd dwcmshc
> instance which is typically connected to an SDIO WiFi module. The node
> names are based on Table 1-2 C910/C906 memory map in the TH1520 System
> User Manual.
>
> Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs
> Signed-off-by: Drew Fustini <dfustini@...libre.com>
> ---
>  arch/riscv/boot/dts/thead/th1520.dtsi | 34 ++++++++++++++++++++++++++++++++++
>  1 file changed, 34 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
> index ba4d2c673ac8..8b915e206f3a 100644
> --- a/arch/riscv/boot/dts/thead/th1520.dtsi
> +++ b/arch/riscv/boot/dts/thead/th1520.dtsi
> @@ -146,6 +146,13 @@ uart_sclk: uart-sclk-clock {
>                 #clock-cells = <0>;
>         };
>
> +       sdhci_clk: sdhci-clock {
> +               compatible = "fixed-clock";
> +               clock-frequency = <198000000>;
> +               clock-output-names = "sdhci_clk";
> +               #clock-cells = <0>;
> +       };
> +
>         soc {
>                 compatible = "simple-bus";
>                 interrupt-parent = <&plic>;
> @@ -304,6 +311,33 @@ dmac0: dma-controller@...fc00000 {
>                         status = "disabled";
>                 };
>
> +               emmc: mmc@...7080000 {
> +                       compatible = "thead,th1520-dwcmshc";
> +                       reg = <0xff 0xe7080000 0x0 0x10000>;
> +                       interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&sdhci_clk>;
> +                       clock-names = "core";
> +                       status = "disabled";
> +               };
> +
> +               sdio0: mmc@...7090000 {
> +                       compatible = "thead,th1520-dwcmshc";
> +                       reg = <0xff 0xe7090000 0x0 0x10000>;
> +                       interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&sdhci_clk>;
> +                       clock-names = "core";
> +                       status = "disabled";
> +               };
> +
> +               sdio1: mmc@...70a0000 {
> +                       compatible = "thead,th1520-dwcmshc";
> +                       reg = <0xff 0xe70a0000 0x0 0x10000>;
> +                       interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&sdhci_clk>;
> +                       clock-names = "core";
> +                       status = "disabled";
> +               };
> +
>                 timer0: timer@...fc32000 {
>                         compatible = "snps,dw-apb-timer";
>                         reg = <0xff 0xefc32000 0x0 0x14>;
>
> --
> 2.34.1
>
Reviewed-by: Guo Ren <guoren@...nel.org>

-- 
Best Regards
 Guo Ren

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