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Message-ID: <20231208-italics-deceiver-e3673e693ae1@spud>
Date:   Fri, 8 Dec 2023 16:26:33 +0000
From:   Conor Dooley <conor@...nel.org>
To:     Chen Wang <unicornxw@...il.com>
Cc:     aou@...s.berkeley.edu, chao.wei@...hgo.com,
        krzysztof.kozlowski+dt@...aro.org, mturquette@...libre.com,
        palmer@...belt.com, paul.walmsley@...ive.com,
        richardcochran@...il.com, robh+dt@...nel.org, sboyd@...nel.org,
        devicetree@...r.kernel.org, linux-clk@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
        haijiao.liu@...hgo.com, xiaoguang.xing@...hgo.com,
        guoren@...nel.org, jszhang@...nel.org, inochiama@...look.com,
        samuel.holland@...ive.com, Chen Wang <unicorn_wang@...look.com>
Subject: Re: [PATCH v6 2/4] dt-bindings: clock: sophgo: support SG2042

On Fri, Dec 08, 2023 at 09:14:02AM +0800, Chen Wang wrote:
> From: Chen Wang <unicorn_wang@...look.com>
> 
> Add bindings for the clock generator on the SG2042 RISC-V SoC.
> 
> Signed-off-by: Chen Wang <unicorn_wang@...look.com>

Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>

Cheers,
Conor.

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