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Message-ID: <CAA8EJpp0v0_0BRguZOskbtv69-OZ32uMtdnb7i4xLyhz=UR8og@mail.gmail.com>
Date: Fri, 8 Dec 2023 13:33:09 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Abhinav Kumar <quic_abhinavk@...cinc.com>
Cc: freedreno@...ts.freedesktop.org, Rob Clark <robdclark@...il.com>,
Sean Paul <sean@...rly.run>,
Marijn Suijten <marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>,
Daniel Vetter <daniel@...ll.ch>,
dri-devel@...ts.freedesktop.org, quic_jesszhan@...cinc.com,
quic_parellan@...cinc.com, linux-arm-msm@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 09/16] drm/msm/dpu: add support to allocate CDM from RM
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar <quic_abhinavk@...cinc.com> wrote:
>
> Even though there is usually only one CDM block, it can be
> used by either HDMI, DisplayPort OR Writeback interfaces.
>
> Hence its allocation needs to be tracked properly by the
> resource manager to ensure appropriate availability of the
> block.
>
> changes in v2:
> - move needs_cdm to topology struct
>
> Signed-off-by: Abhinav Kumar <quic_abhinavk@...cinc.com>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 1 +
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 +
> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 38 +++++++++++++++++++--
> drivers/gpu/drm/msm/msm_drv.h | 2 ++
> 4 files changed, 40 insertions(+), 2 deletions(-)
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
> index 9db4cf61bd29..5df545904057 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
> @@ -98,6 +98,7 @@ enum dpu_hw_blk_type {
> DPU_HW_BLK_DSPP,
> DPU_HW_BLK_MERGE_3D,
> DPU_HW_BLK_DSC,
> + DPU_HW_BLK_CDM,
> DPU_HW_BLK_MAX,
> };
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
> index df6271017b80..a0cd36e45a01 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
> @@ -135,6 +135,7 @@ struct dpu_global_state {
> uint32_t ctl_to_enc_id[CTL_MAX - CTL_0];
> uint32_t dspp_to_enc_id[DSPP_MAX - DSPP_0];
> uint32_t dsc_to_enc_id[DSC_MAX - DSC_0];
> + uint32_t cdm_to_enc_id;
> };
>
> struct dpu_global_state
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> index 7ed476b96304..b58a9c2ae326 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> @@ -435,6 +435,26 @@ static int _dpu_rm_reserve_dsc(struct dpu_rm *rm,
> return 0;
> }
>
> +static int _dpu_rm_reserve_cdm(struct dpu_rm *rm,
> + struct dpu_global_state *global_state,
> + struct drm_encoder *enc)
> +{
> + /* try allocating only one CDM block */
> + if (!rm->cdm_blk) {
> + DPU_ERROR("CDM block does not exist\n");
Nit: maybe this should be an info or a warning instead?
> + return -EIO;
> + }
> +
> + if (global_state->cdm_to_enc_id) {
> + DPU_ERROR("CDM_0 is already allocated\n");
> + return -EIO;
> + }
> +
> + global_state->cdm_to_enc_id = enc->base.id;
> +
> + return 0;
> +}
> +
> static int _dpu_rm_make_reservation(
> struct dpu_rm *rm,
> struct dpu_global_state *global_state,
> @@ -460,6 +480,14 @@ static int _dpu_rm_make_reservation(
> if (ret)
> return ret;
>
> + if (reqs->topology.needs_cdm) {
> + ret = _dpu_rm_reserve_cdm(rm, global_state, enc);
> + if (ret) {
> + DPU_ERROR("unable to find CDM blk\n");
> + return ret;
> + }
> + }
> +
> return ret;
> }
>
> @@ -470,9 +498,9 @@ static int _dpu_rm_populate_requirements(
> {
> reqs->topology = req_topology;
>
> - DRM_DEBUG_KMS("num_lm: %d num_dsc: %d num_intf: %d\n",
> + DRM_DEBUG_KMS("num_lm: %d num_dsc: %d num_intf: %d cdm: %d\n",
> reqs->topology.num_lm, reqs->topology.num_dsc,
> - reqs->topology.num_intf);
> + reqs->topology.num_intf, reqs->topology.needs_cdm);
>
> return 0;
> }
> @@ -501,6 +529,7 @@ void dpu_rm_release(struct dpu_global_state *global_state,
> ARRAY_SIZE(global_state->dsc_to_enc_id), enc->base.id);
> _dpu_rm_clear_mapping(global_state->dspp_to_enc_id,
> ARRAY_SIZE(global_state->dspp_to_enc_id), enc->base.id);
> + _dpu_rm_clear_mapping(&global_state->cdm_to_enc_id, 1, enc->base.id);
> }
>
> int dpu_rm_reserve(
> @@ -574,6 +603,11 @@ int dpu_rm_get_assigned_resources(struct dpu_rm *rm,
> hw_to_enc_id = global_state->dsc_to_enc_id;
> max_blks = ARRAY_SIZE(rm->dsc_blks);
> break;
> + case DPU_HW_BLK_CDM:
> + hw_blks = &rm->cdm_blk;
> + hw_to_enc_id = &global_state->cdm_to_enc_id;
> + max_blks = 1;
> + break;
> default:
> DPU_ERROR("blk type %d not managed by rm\n", type);
> return 0;
> diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
> index a205127ccc93..1ebad634781c 100644
> --- a/drivers/gpu/drm/msm/msm_drv.h
> +++ b/drivers/gpu/drm/msm/msm_drv.h
> @@ -92,12 +92,14 @@ enum msm_event_wait {
> * @num_intf: number of interfaces the panel is mounted on
> * @num_dspp: number of dspp blocks used
> * @num_dsc: number of Display Stream Compression (DSC) blocks used
> + * @needs_cdm: indicates whether cdm block is needed for this display topology
> */
> struct msm_display_topology {
> u32 num_lm;
> u32 num_intf;
> u32 num_dspp;
> u32 num_dsc;
> + bool needs_cdm;
> };
>
> /* Commit/Event thread specific structure */
> --
> 2.40.1
>
--
With best wishes
Dmitry
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