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Message-ID: <CAA8EJppBTVw5ZoVGCxx9LYu-1dtEPqiE-H6SMk+6BCDd4O_DSA@mail.gmail.com>
Date:   Fri, 8 Dec 2023 14:36:36 +0200
From:   Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Lorenzo Pieralisi <lpieralisi@...nel.org>,
        Krzysztof WilczyƄski <kw@...ux.com>,
        Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Manivannan Sadhasivam <mani@...nel.org>,
        linux-arm-msm@...r.kernel.org, linux-pci@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Subject: Re: [PATCH v3 3/4] dt-bindings: PCI: qcom: correct clocks for SM8150

On Fri, 8 Dec 2023 at 14:18, Krzysztof Kozlowski
<krzysztof.kozlowski@...aro.org> wrote:
>
> On 08/12/2023 12:09, Dmitry Baryshkov wrote:
> > On Fri, 8 Dec 2023 at 12:52, Krzysztof Kozlowski
> > <krzysztof.kozlowski@...aro.org> wrote:
> >>
> >> PCI node in Qualcomm SM8150 should have exactly 8 clocks, including the
> >> ref clock.
> >>
> >> Suggested-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> >>
> >> ---
> >>
> >> Please take the patch via PCI tree.
> >>
> >> Changes in v3:
> >> 1. New patch: Split from sc8180x change.
> >> 2. Add refclk as explained here:
> >>    https://lore.kernel.org/all/20231121065440.GB3315@thinkpad/
> >> ---
> >>  .../devicetree/bindings/pci/qcom,pcie.yaml    | 26 +++++++++++++++++++
> >>  1 file changed, 26 insertions(+)
> >>
> >> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> >> index 5214bf7a9045..a93ab3b54066 100644
> >> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> >> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> >> @@ -559,6 +559,32 @@ allOf:
> >>            contains:
> >>              enum:
> >>                - qcom,pcie-sm8150
> >> +    then:
> >> +      properties:
> >> +        clocks:
> >> +          minItems: 8
> >> +          maxItems: 8
> >> +        clock-names:
> >> +          items:
> >> +            - const: pipe # PIPE clock
> >> +            - const: aux # Auxiliary clock
> >> +            - const: cfg # Configuration clock
> >> +            - const: bus_master # Master AXI clock
> >> +            - const: bus_slave # Slave AXI clock
> >> +            - const: slave_q2a # Slave Q2A clock
> >> +            - const: tbu # PCIe TBU clock
> >> +            - const: ref # REFERENCE clock
> >
> > Can we change the order of the tbu and ref clocks and fold this into
> > the sc810x case?
>
> I prefer not, because this is an ABI-concern and we are supposed to keep
> things stable.

Ack, fair enough.

-- 
With best wishes
Dmitry

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