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Message-ID: <3f28c1f7-f29c-461f-a90e-58d8e0996cc0@sifive.com>
Date: Mon, 11 Dec 2023 10:16:14 -0600
From: Samuel Holland <samuel.holland@...ive.com>
To: Christoph Hellwig <hch@...radead.org>
Cc: linux-arm-kernel@...ts.infradead.org, loongarch@...ts.linux.dev,
linuxppc-dev@...ts.ozlabs.org, x86@...nel.org,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
amd-gfx@...ts.freedesktop.org, linux-arch@...r.kernel.org
Subject: Re: [RFC PATCH 09/12] riscv: Add support for kernel-mode FPU
On 2023-12-11 10:11 AM, Christoph Hellwig wrote:
>> +#ifdef __riscv_f
>> +
>> +#define kernel_fpu_begin() \
>> + static_assert(false, "floating-point code must use a separate translation unit")
>> +#define kernel_fpu_end() kernel_fpu_begin()
>> +
>> +#else
>> +
>> +void kernel_fpu_begin(void);
>> +void kernel_fpu_end(void);
>> +
>> +#endif
>
> I'll assume this is related to trick that places code in a separate
> translation unit, but I fail to understand it. Can you add a comment
> explaining it?
Yes, I can add a comment. Here, __riscv_f refers to RISC-V's F extension for
single-precision floating point, which is enabled by CC_FLAGS_FPU.
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