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Message-ID: <ee9db34a-2b3d-46b3-ba36-22a22b080d70@linux.intel.com>
Date: Mon, 11 Dec 2023 14:01:37 -0500
From: "Liang, Kan" <kan.liang@...ux.intel.com>
To: Leo Yan <leo.yan@...aro.org>
Cc: acme@...nel.org, irogers@...gle.com, peterz@...radead.org,
mingo@...hat.com, namhyung@...nel.org, jolsa@...nel.org,
adrian.hunter@...el.com, john.g.garry@...cle.com, will@...nel.org,
james.clark@....com, mike.leach@...aro.org,
yuhaixin.yhx@...ux.alibaba.com, renyu.zj@...ux.alibaba.com,
tmricht@...ux.ibm.com, ravi.bangoria@....com,
linux-kernel@...r.kernel.org, linux-perf-users@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH V2 1/5] perf mem: Add mem_events into the supported
perf_pmu
On 2023-12-09 1:34 a.m., Leo Yan wrote:
> Hi Kan,
>
> On Fri, Dec 08, 2023 at 01:14:28PM -0500, Liang, Kan wrote:
>
> [...]
>
>>> Now I cannot access a machine for testing Arm SPE, but I will play
>>> a bit for this patch set to ensure it can pass compilation. After
>>> that, I will seek Arm maintainers/reviewers help for the test.
>>
>> Thanks. I guess I will hold the v3 until the test is done in case there
>> are other issues found in ARM.
>
> I will hold on a bit for the test until this patch set addresses the
> concern for the breakage issues on Arm64. Please check my review in
> other replies.
The reviews in the other replies don't look like break any current usage
on Arm64. I think the breakage issue is what you described in this
patch, right?
If we move the check of "arm_spe_0" to arch/arm/util/pmu.c, it seems we
have to move the perf_mem_events_arm[] into arch/arm/util/mem-events.c
as well. Is it OK?
I'm not familiar with ARM and have no idea how those events are
organized under arm64 and arm. Could you please send a fix for the
building failure on aarch64? I will fold it into the V3.
Thanks,
Kan
>
> Thanks,
> Leo
>
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