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Message-ID: <d202770a-3a3a-4ee2-b0de-b86e2f3e83ce@lunn.ch>
Date: Mon, 11 Dec 2023 21:03:36 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Jianheng Zhang <Jianheng.Zhang@...opsys.com>
Cc: Alexandre Torgue <alexandre.torgue@...s.st.com>,
Jose Abreu <Jose.Abreu@...opsys.com>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
"open list:STMMAC ETHERNET DRIVER" <netdev@...r.kernel.org>,
"moderated list:ARM/STM32 ARCHITECTURE"
<linux-stm32@...md-mailman.stormreply.com>,
"moderated list:ARM/STM32 ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>,
open list <linux-kernel@...r.kernel.org>,
James Li <James.Li1@...opsys.com>,
Martin McKenny <Martin.McKenny@...opsys.com>
Subject: Re: [PATCH net-next] net: stmmac: xgmac3+: add FPE handshaking
support
On Mon, Dec 11, 2023 at 06:13:21AM +0000, Jianheng Zhang wrote:
> Adds the HW specific support for Frame Preemption handshaking on XGMAC3+
> cores.
>
> Signed-off-by: Jianheng Zhang <Jianheng.Zhang@...opsys.com>
> ---
> drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h | 6 ++
> .../net/ethernet/stmicro/stmmac/dwxgmac2_core.c | 65 ++++++++++++++++++----
> 2 files changed, 60 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h
> index 207ff17..306d15b 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h
> @@ -194,6 +194,12 @@
> #define XGMAC_MDIO_DATA 0x00000204
> #define XGMAC_MDIO_C22P 0x00000220
> #define XGMAC_FPE_CTRL_STS 0x00000280
> +#define XGMAC_TRSP BIT(19)
> +#define XGMAC_TVER BIT(18)
> +#define XGMAC_RRSP BIT(17)
> +#define XGMAC_RVER BIT(16)
> +#define XGMAC_SRSP BIT(2)
> +#define XGMAC_SVER BIT(1)
> #define XGMAC_EFPE BIT(0)
> #define XGMAC_ADDRx_HIGH(x) (0x00000300 + (x) * 0x8)
> #define XGMAC_ADDR_MAX 32
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
> index eb48211..091d932 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
> @@ -1439,22 +1439,63 @@ static void dwxgmac3_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *
> {
> u32 value;
>
> - if (!enable) {
> - value = readl(ioaddr + XGMAC_FPE_CTRL_STS);
> + if (enable) {
> + cfg->fpe_csr = XGMAC_EFPE;
> + value = readl(ioaddr + XGMAC_RXQ_CTRL1);
> + value &= ~XGMAC_RQ;
> + value |= (num_rxq - 1) << XGMAC_RQ_SHIFT;
> + writel(value, ioaddr + XGMAC_RXQ_CTRL1);
> + } else {
> + cfg->fpe_csr = 0;
> + }
> + writel(cfg->fpe_csr, ioaddr + XGMAC_FPE_CTRL_STS);
> +}
>
> - value &= ~XGMAC_EFPE;
> +static int dwxgmac3_fpe_irq_status(void __iomem *ioaddr, struct net_device *dev)
> +{
> + u32 value;
> + int status;
>
> - writel(value, ioaddr + XGMAC_FPE_CTRL_STS);
> - return;
> + status = FPE_EVENT_UNKNOWN;
> +
> + /* Reads from the XGMAC_FPE_CTRL_STS register should only be performed
> + * here, since the status flags of MAC_FPE_CTRL_STS are "clear on read"
> + */
> + value = readl(ioaddr + XGMAC_FPE_CTRL_STS);
> +
> + if (value & XGMAC_TRSP) {
> + status |= FPE_EVENT_TRSP;
> + netdev_info(dev, "FPE: Respond mPacket is transmitted\n");
netdev_info()? Is this going to spam the logs? Should it be netdev_dbg()
Andrew
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