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Message-ID: <CA+EHjTyscwpSeRytJu_OX+pS4+BMXorhoOSvTuNsUM2kR=VkCQ@mail.gmail.com>
Date:   Mon, 11 Dec 2023 09:26:01 +0000
From:   Fuad Tabba <tabba@...gle.com>
To:     Mark Brown <broonie@...nel.org>
Cc:     Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>, Joey Gouly <joey.gouly@....com>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 11/13] arm64/sysreg: Update HCRX_EL2 definition for
 DDI0601 2023-09

Hi Mark,

On Sat, Dec 9, 2023 at 1:03 AM Mark Brown <broonie@...nel.org> wrote:
>
> DDI0601 2023-09 defines new fields in HCRX_EL2 controlling access to new
> system registers, update our definition of HCRX_EL2 to reflect this.
>
> Signed-off-by: Mark Brown <broonie@...nel.org>
> ---

This is not an issue with this patch per se, but all FGT registers
prefix bits that trap on 0 with an n, e.g., HFGxTR_EL2:
nAMAIR2_EL1...nACCDATA_EL1, but not HCRX_EL2. I think that most
HCRX_EL2 bits trap on 0, except for TALLINT. It shouldn't be done in
this patch, but I'm wondering if it's worth the hassle to rename the
bits, or if there's too much existing code and in-flight patches that
it's more trouble than it's worth.

That said,
Reviewed-by: Fuad Tabba <tabba@...gle.com>

Cheers,
/fuad

>  arch/arm64/tools/sysreg | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index 4137179e7570..1acec8f5c37d 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -2458,7 +2458,9 @@ Fields    ZCR_ELx
>  EndSysreg
>
>  Sysreg HCRX_EL2        3       4       1       2       2
> -Res0   63:23
> +Res0   63:25
> +Field  24      PACMEn
> +Field  23      EnFPM
>  Field  22      GCSEn
>  Field  21      EnIDCP128
>  Field  20      EnSDERR
>
> --
> 2.39.2
>

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