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Message-ID: <ZXbgUeuf0-dYBOYV@hovoldconsulting.com>
Date: Mon, 11 Dec 2023 11:11:29 +0100
From: Johan Hovold <johan@...nel.org>
To: Rob Clark <robdclark@...il.com>
Cc: iommu@...ts.linux-foundation.org, freedreno@...ts.freedesktop.org,
linux-arm-msm@...r.kernel.org, Robin Murphy <robin.murphy@....com>,
Rob Clark <robdclark@...omium.org>, stable@...r.kernel.org,
Will Deacon <will@...nel.org>, Joerg Roedel <joro@...tes.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
Bjorn Andersson <quic_bjorande@...cinc.com>,
Manivannan Sadhasivam <mani@...nel.org>,
Danila Tikhonov <danila@...xyga.com>,
Elliot Berman <quic_eberman@...cinc.com>,
"moderated list:ARM SMMU DRIVERS"
<linux-arm-kernel@...ts.infradead.org>,
"open list:IOMMU SUBSYSTEM" <iommu@...ts.linux.dev>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2] iommu/arm-smmu-qcom: Add missing GMU entry to match
table
On Sun, Dec 10, 2023 at 10:06:53AM -0800, Rob Clark wrote:
> From: Rob Clark <robdclark@...omium.org>
>
> In some cases the firmware expects cbndx 1 to be assigned to the GMU,
> so we also want the default domain for the GMU to be an identy domain.
> This way it does not get a context bank assigned. Without this, both
> of_dma_configure() and drm/msm's iommu_domain_attach() will trigger
> allocating and configuring a context bank. So GMU ends up attached to
> both cbndx 1 and later cbndx 2. This arrangement seemingly confounds
> and surprises the firmware if the GPU later triggers a translation
> fault, resulting (on sc8280xp / lenovo x13s, at least) in the SMMU
> getting wedged and the GPU stuck without memory access.
>
> Cc: stable@...r.kernel.org
> Signed-off-by: Rob Clark <robdclark@...omium.org>
Tested-by: Johan Hovold <johan+linaro@...nel.org>
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