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Message-ID: <20231211025624.28991-1-chunfeng.yun@mediatek.com>
Date: Mon, 11 Dec 2023 10:56:23 +0800
From: Chunfeng Yun <chunfeng.yun@...iatek.com>
To: Vinod Koul <vkoul@...nel.org>, Rob Herring <robh+dt@...nel.org>
CC: Chunfeng Yun <chunfeng.yun@...iatek.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<linux-phy@...ts.infradead.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
Macpaul Lin <macpaul.lin@...iatek.com>
Subject: [PATCH v2 1/2] dt-bindings: phy: mediatek: tphy: add a property for force-mode switch
Due to some old SoCs with shared t-phy between usb3 and pcie only support
force-mode switch, and shared and non-shared t-phy may exist at the same
time on a SoC, can't use compatible to distinguish between shared and
non-shared t-phy, add a property to supported it.
Currently, only support switch from default pcie mode to usb3 mode.
But now prefer to use "mediatek,syscon-type" on new SoC as far as possible.
Signed-off-by: Chunfeng Yun <chunfeng.yun@...iatek.com>
---
v2: modify commit message, and property description
---
Documentation/devicetree/bindings/phy/mediatek,tphy.yaml | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
index 2bb91542e984..acba0720125d 100644
--- a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
+++ b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
@@ -235,6 +235,15 @@ patternProperties:
Specify the flag to enable BC1.2 if support it
type: boolean
+ mediatek,force-mode:
+ description:
+ The force mode is used to manually switch the shared phy mode between
+ USB3 and PCIe, when USB3 phy type is selected by the consumer, and
+ force-mode is set, will cause phy's power and pipe toggled and force
+ phy as USB3 mode which switched from default PCIe mode. But perfer to
+ use the property "mediatek,syscon-type" for newer SoCs that support it.
+ type: boolean
+
mediatek,syscon-type:
$ref: /schemas/types.yaml#/definitions/phandle-array
maxItems: 1
--
2.18.0
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