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Message-ID: <d852894e10cb49e0ba4f991bf3378191@EXMBX066.cuchost.com>
Date: Tue, 12 Dec 2023 02:51:15 +0000
From: JeeHeng Sia <jeeheng.sia@...rfivetech.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
Emil Renner Berthing <emil.renner.berthing@...onical.com>,
"kernel@...il.dk" <kernel@...il.dk>,
"conor@...nel.org" <conor@...nel.org>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"krzysztof.kozlowski+dt@...aro.org"
<krzysztof.kozlowski+dt@...aro.org>,
"paul.walmsley@...ive.com" <paul.walmsley@...ive.com>,
"palmer@...belt.com" <palmer@...belt.com>,
"aou@...s.berkeley.edu" <aou@...s.berkeley.edu>,
"mturquette@...libre.com" <mturquette@...libre.com>,
"sboyd@...nel.org" <sboyd@...nel.org>,
"p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
Hal Feng <hal.feng@...rfivetech.com>,
Xingyu Wu <xingyu.wu@...rfivetech.com>
CC: "linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
Leyfoon Tan <leyfoon.tan@...rfivetech.com>
Subject: RE: [PATCH v1 16/16] riscv: dts: starfive: jh8100: Add clocks and
resets nodes
> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> Sent: Saturday, December 9, 2023 1:58 AM
> To: Emil Renner Berthing <emil.renner.berthing@...onical.com>; JeeHeng Sia <jeeheng.sia@...rfivetech.com>; kernel@...il.dk;
> conor@...nel.org; robh+dt@...nel.org; krzysztof.kozlowski+dt@...aro.org; paul.walmsley@...ive.com; palmer@...belt.com;
> aou@...s.berkeley.edu; mturquette@...libre.com; sboyd@...nel.org; p.zabel@...gutronix.de; Hal Feng
> <hal.feng@...rfivetech.com>; Xingyu Wu <xingyu.wu@...rfivetech.com>
> Cc: linux-riscv@...ts.infradead.org; devicetree@...r.kernel.org; linux-kernel@...r.kernel.org; linux-clk@...r.kernel.org; Leyfoon Tan
> <leyfoon.tan@...rfivetech.com>
> Subject: Re: [PATCH v1 16/16] riscv: dts: starfive: jh8100: Add clocks and resets nodes
>
> On 08/12/2023 17:39, Emil Renner Berthing wrote:
> > Sia Jee Heng wrote:
> >> Add SYSCRG/SYSCRG-NE/SYSCRG-NW/SYSCRG-SW/AONCRG clock and reset
> >> nodes for JH8100 RISC-V SoC.
> >>
> >> Signed-off-by: Sia Jee Heng <jeeheng.sia@...rfivetech.com>
> >> Reviewed-by: Ley Foon Tan <leyfoon.tan@...rfivetech.com>
> >> ---
> >> arch/riscv/boot/dts/starfive/jh8100-clk.dtsi | 180 +++++++++++++++++++
> >> arch/riscv/boot/dts/starfive/jh8100.dtsi | 115 ++++++++++++
> >
> > Why the split here? I mean why can't the clocks just be in the jh8100.dtsi?
>
> There should be. What's the point? Clocks are internal part of SoC and
> not really re-usable piece of hardware.
Can move it back to the SoC.dtsi
>
> Best regards,
> Krzysztof
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