linux-kernel - Re: [PATCH v5 4/5] clk: mediatek: add pcw_chg

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Message-ID: <27d8ce67-fb8b-403f-a35e-3e03a1ffd1a0@collabora.com>
Date:   Tue, 12 Dec 2023 10:31:02 +0100
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
To:     Daniel Golle <daniel@...rotopia.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Sabrina Dubroca <sd@...asysnail.net>,
        Chen-Yu Tsai <wenst@...omium.org>,
        "Garmin.Chang" <Garmin.Chang@...iatek.com>,
        Sam Shih <sam.shih@...iatek.com>,
        Frank Wunderlich <frank-w@...lic-files.de>,
        Dan Carpenter <dan.carpenter@...aro.org>,
        James Liao <jamesjj.liao@...iatek.com>,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, netdev@...r.kernel.org
Subject: Re: [PATCH v5 4/5] clk: mediatek: add pcw_chg_bit control for PLLs of
 MT7988

Il 12/12/23 04:19, Daniel Golle ha scritto:
> From: Sam Shih <sam.shih@...iatek.com>
> 
> Introduce pcw_chg_bit member to struct mtk_pll_data and use it instead
> of the previously hardcoded PCW_CHG_MASK macro if set.
> This will needed for clocks on the MT7988 SoC.
> 
> Signed-off-by: Sam Shih <sam.shih@...iatek.com>
> Signed-off-by: Daniel Golle <daniel@...rotopia.org>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>