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Message-ID: <ZXnQKBnweCT+si6/@lizhi-Precision-Tower-5810>
Date: Wed, 13 Dec 2023 10:39:20 -0500
From: Frank Li <Frank.li@....com>
To: Rob Herring <robh@...nel.org>
Cc: bhelgaas@...gle.com, conor+dt@...nel.org,
devicetree@...r.kernel.org, festevam@...il.com, helgaas@...nel.org,
hongxing.zhu@....com, imx@...ts.linux.dev, kernel@...gutronix.de,
krzysztof.kozlowski+dt@...aro.org, kw@...ux.com,
l.stach@...gutronix.de, linux-arm-kernel@...ts.infradead.org,
linux-imx@....com, linux-kernel@...r.kernel.org,
linux-pci@...r.kernel.org, lpieralisi@...nel.org,
manivannan.sadhasivam@...aro.org, s.hauer@...gutronix.de,
shawnguo@...nel.org
Subject: Re: [PATCH v3 08/13] dt-bindings: imx6q-pcie: Add imx95 pcie
compatible string
On Wed, Dec 13, 2023 at 08:36:15AM -0600, Rob Herring wrote:
> On Tue, Dec 12, 2023 at 06:28:43PM -0500, Frank Li wrote:
> > On Tue, Dec 12, 2023 at 04:44:26PM -0600, Rob Herring wrote:
> > > On Mon, Dec 11, 2023 at 04:58:37PM -0500, Frank Li wrote:
> > > > From: Richard Zhu <hongxing.zhu@....com>
> > > >
> > > > Add i.MX95 PCIe "fsl,imx95-pcie" compatible string.
> > > > Add "atu" and "serdes" to reg-names.
> > > >
> > > > Signed-off-by: Richard Zhu <hongxing.zhu@....com>
> > > > ---
> > > >
> > > > Notes:
> > > > Change from v2 to v3
> > > > - Remove krzy's ACK tag
> > > > - Add condition check for imx95, which required more reg-names then old
> > > > platform, so need Krzy review again,
> > > >
> > > > Change from v1 to v2
> > > > - add Krzy's ACK tag
> > > >
> > > > .../bindings/pci/fsl,imx6q-pcie.yaml | 18 ++++++++++++++++++
> > > > 1 file changed, 18 insertions(+)
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> > > > index 81bbb8728f0f9..b8fcf8258f031 100644
> > > > --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> > > > +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> > > > @@ -29,6 +29,7 @@ properties:
> > > > - fsl,imx8mq-pcie
> > > > - fsl,imx8mm-pcie
> > > > - fsl,imx8mp-pcie
> > > > + - fsl,imx95-pcie
> > > >
> > > > reg:
> > > > items:
> > > > @@ -90,6 +91,22 @@ required:
> > > > allOf:
> > > > - $ref: /schemas/pci/snps,dw-pcie.yaml#
> > > > - $ref: /schemas/pci/fsl,imx6q-pcie-common.yaml#
> > > > + - if:
> > > > + properties:
> > > > + compatible:
> > > > + enum:
> > > > + - fsl,imx95-pcie
> > > > + then:
> > > > + properties:
> > > > + reg:
> > > > + minItems: 4
> > > > + reg-names:
> > > > + items:
> > > > + - const: dbi
> > > > + - const: serdes
> > >
> > > Did you test this? It should fail because 'serdes' would need to be
> > > added to snps,dw-pcie.yaml.
> >
> > I run "make dt_binding_check DT_SCHEMA_FILES=/pci/", no error report.
>
> Only because you have no example. What about your actual .dts?
I see. 95 is quite new. Still have not good base yet.
I may just take take care this session.
>
> > And PCIe function can work.
> >
> > >
> > > Is this really not a separate phy block?
> >
> > This is misc block, which included phy and also include some registers
> > about SID for each PCI devices. I plan do it later.
>
> Sounds like it should be a separate node and use the phy binding. Do it
> correctly from the start, not later. Later is an ABI break.
Actually, I considerred phy binding. The major problem is LUT (look up
table) for MSI and SMMU. LUT need be config according to some PCI device
information. I have not find good hook for that at PHY driver.
>
> What is SID?
Stream ID, each device master have SID, which pass to IOMMU and GIC ITS.
Frank
>
> Rob
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