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Message-ID: <a5fe0a50-ca9b-b3dc-c626-0b75d3eb7c02@quicinc.com>
Date:   Wed, 13 Dec 2023 13:31:54 -0800
From:   Abhinav Kumar <quic_abhinavk@...cinc.com>
To:     Jessica Zhang <quic_jesszhan@...cinc.com>,
        Rob Clark <robdclark@...il.com>,
        Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
        "Sean Paul" <sean@...rly.run>,
        Marijn Suijten <marijn.suijten@...ainline.org>,
        "David Airlie" <airlied@...il.com>, Daniel Vetter <daniel@...ll.ch>
CC:     <linux-arm-msm@...r.kernel.org>, <dri-devel@...ts.freedesktop.org>,
        <freedreno@...ts.freedesktop.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 1/2] drm/msm/dpu: Set input_sel bit for INTF



On 12/13/2023 1:30 PM, Jessica Zhang wrote:
> Set the input_sel bit for encoders as it was missed in the initial
> implementation.
> 
> Reported-by: Rob Clark <robdclark@...il.com>
> Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/39
> Fixes: 91143873a05d ("drm/msm/dpu: Add MISR register support for interface")
> Signed-off-by: Jessica Zhang <quic_jesszhan@...cinc.com>
> ---
>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 2 +-
>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c   | 2 +-
>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c | 9 +++++++--
>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h | 3 ++-
>   4 files changed, 11 insertions(+), 5 deletions(-)
> 

Reviewed-by: Abhinav Kumar <quic_abhinavk@...cinc.com>

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