[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20231213070301.1684751-7-peterlin@andestech.com>
Date: Wed, 13 Dec 2023 15:02:51 +0800
From: Yu Chien Peter Lin <peterlin@...estech.com>
To: <acme@...nel.org>, <adrian.hunter@...el.com>,
<ajones@...tanamicro.com>, <alexander.shishkin@...ux.intel.com>,
<andre.przywara@....com>, <anup@...infault.org>,
<aou@...s.berkeley.edu>, <atishp@...shpatra.org>,
<conor+dt@...nel.org>, <conor.dooley@...rochip.com>,
<conor@...nel.org>, <devicetree@...r.kernel.org>,
<dminus@...estech.com>, <evan@...osinc.com>,
<geert+renesas@...der.be>, <guoren@...nel.org>, <heiko@...ech.de>,
<irogers@...gle.com>, <jernej.skrabec@...il.com>,
<jolsa@...nel.org>, <jszhang@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <linux-perf-users@...r.kernel.org>,
<linux-renesas-soc@...r.kernel.org>,
<linux-riscv@...ts.infradead.org>, <linux-sunxi@...ts.linux.dev>,
<locus84@...estech.com>, <magnus.damm@...il.com>,
<mark.rutland@....com>, <mingo@...hat.com>, <n.shubin@...ro.com>,
<namhyung@...nel.org>, <palmer@...belt.com>,
<paul.walmsley@...ive.com>, <peterlin@...estech.com>,
<peterz@...radead.org>, <prabhakar.mahadev-lad.rj@...renesas.com>,
<rdunlap@...radead.org>, <robh+dt@...nel.org>,
<samuel@...lland.org>, <sunilvl@...tanamicro.com>,
<tglx@...utronix.de>, <tim609@...estech.com>, <uwu@...nowy.me>,
<wens@...e.org>, <will@...nel.org>, <ycliang@...estech.com>,
<inochiama@...look.com>
Subject: [PATCH v5 06/16] perf: RISC-V: Eliminate redundant interrupt enable/disable operations
The interrupt enable/disable operations are already performed by the
IRQ chip functions riscv_intc_irq_unmask()/riscv_intc_irq_mask() during
enable_percpu_irq()/disable_percpu_irq(). It can be done only once.
Signed-off-by: Yu Chien Peter Lin <peterlin@...estech.com>
---
This patch allows us to drop unnecessary ALT_SBI_PMU_OVF_{DISABLE,ENABLE}
in the initial PATCH3 [1].
[1] https://patchwork.kernel.org/project/linux-riscv/patch/20230907021635.1002738-4-peterlin@andestech.com/
Changes v1 -> v2:
- New patch
Changes v2 -> v3:
- No change
Changes v3 -> v4:
- No change
Changes v4 -> v5:
- No change
---
drivers/perf/riscv_pmu_sbi.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
index 16acd4dcdb96..2edbc37abadf 100644
--- a/drivers/perf/riscv_pmu_sbi.c
+++ b/drivers/perf/riscv_pmu_sbi.c
@@ -781,7 +781,6 @@ static int pmu_sbi_starting_cpu(unsigned int cpu, struct hlist_node *node)
if (riscv_pmu_use_irq) {
cpu_hw_evt->irq = riscv_pmu_irq;
csr_clear(CSR_IP, BIT(riscv_pmu_irq_num));
- csr_set(CSR_IE, BIT(riscv_pmu_irq_num));
enable_percpu_irq(riscv_pmu_irq, IRQ_TYPE_NONE);
}
@@ -792,7 +791,6 @@ static int pmu_sbi_dying_cpu(unsigned int cpu, struct hlist_node *node)
{
if (riscv_pmu_use_irq) {
disable_percpu_irq(riscv_pmu_irq);
- csr_clear(CSR_IE, BIT(riscv_pmu_irq_num));
}
/* Disable all counters access for user mode now */
--
2.34.1
Powered by blists - more mailing lists