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Message-ID: <CAJM55Z8ndFEg1gqk5=HydjN93iKY-f0k=FDpcL-hYH+_GA4Taw@mail.gmail.com>
Date: Wed, 13 Dec 2023 04:00:29 -0800
From: Emil Renner Berthing <emil.renner.berthing@...onical.com>
To: JeeHeng Sia <jeeheng.sia@...rfivetech.com>,
Emil Renner Berthing <emil.renner.berthing@...onical.com>,
"kernel@...il.dk" <kernel@...il.dk>,
"conor@...nel.org" <conor@...nel.org>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"krzysztof.kozlowski+dt@...aro.org"
<krzysztof.kozlowski+dt@...aro.org>,
"paul.walmsley@...ive.com" <paul.walmsley@...ive.com>,
"palmer@...belt.com" <palmer@...belt.com>,
"aou@...s.berkeley.edu" <aou@...s.berkeley.edu>,
"mturquette@...libre.com" <mturquette@...libre.com>,
"sboyd@...nel.org" <sboyd@...nel.org>,
"p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
Hal Feng <hal.feng@...rfivetech.com>,
Xingyu Wu <xingyu.wu@...rfivetech.com>
Cc: "linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
Leyfoon Tan <leyfoon.tan@...rfivetech.com>
Subject: RE: [PATCH v1 07/16] dt-bindings: clock: Add StarFive JH8100
System-North-West clock and reset generator
JeeHeng Sia wrote:
> > -----Original Message-----
> > From: Emil Renner Berthing <emil.renner.berthing@...onical.com>
> > Sent: Saturday, December 9, 2023 12:37 AM
> > To: JeeHeng Sia <jeeheng.sia@...rfivetech.com>; kernel@...il.dk; conor@...nel.org; robh+dt@...nel.org;
> > krzysztof.kozlowski+dt@...aro.org; paul.walmsley@...ive.com; palmer@...belt.com; aou@...s.berkeley.edu;
> > mturquette@...libre.com; sboyd@...nel.org; p.zabel@...gutronix.de; emil.renner.berthing@...onical.com; Hal Feng
> > <hal.feng@...rfivetech.com>; Xingyu Wu <xingyu.wu@...rfivetech.com>
> > Cc: linux-riscv@...ts.infradead.org; devicetree@...r.kernel.org; linux-kernel@...r.kernel.org; linux-clk@...r.kernel.org; Leyfoon Tan
> > <leyfoon.tan@...rfivetech.com>
> > Subject: Re: [PATCH v1 07/16] dt-bindings: clock: Add StarFive JH8100 System-North-West clock and reset generator
> >
> > Sia Jee Heng wrote:
> > > Add bindings for the System-North-West clock and reset generator
> > > (SYSCRG-NW) on JH8100 SoC.
> > >
> > > Signed-off-by: Sia Jee Heng <jeeheng.sia@...rfivetech.com>
> > > Reviewed-by: Ley Foon Tan <leyfoon.tan@...rfivetech.com>
> > > ---
> > > .../clock/starfive,jh8100-syscrg-nw.yaml | 119 ++++++++++++++++++
> >
> > The JH7110 clocks, the JH8100 system and always-on all follow the Xcrg pattern:
> > syscrg
> > aoncrg
> > stgcrg
> > ispcrg
> > voutcrg
> > etc.
> >
> > Is there a reason the north-west, north-east and south-west breaks this pattern?
> > I'd have expected them to be called something like
> > nwcrg, JH8100_NWCLK_*, JH8100_NWRST_*,
> > necrg, JH8100_NECLK_*, JH8100_NERST_* and
> > swcrg, JH8100_SWCLK_*, JH8100_SWRST_*
> >
> > Just like all the other Starfive drivers.
> Understood your concern. We don’t have the intention to break the pattern,
> but the reason we skip the SoC_ prefix is that the SoC names were already
> defined in the header file with the SoC name.
> However, I can put it back, of course.
Yes, all these 3 JHXX00 drivers are almost identical. There should be no reason
to name any one of them differently. Having them all be as similar as possible
will make it a lot easier to maintain in the future. If you don't like a
pattern then please change it for all the similar drivers and don't make just
one of them be different.
/Emil
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