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Message-ID: <20231213142414.GH86143@leoy-huanghe.lan>
Date:   Wed, 13 Dec 2023 22:24:14 +0800
From:   Leo Yan <leo.yan@...aro.org>
To:     "Liang, Kan" <kan.liang@...ux.intel.com>
Cc:     acme@...nel.org, irogers@...gle.com, peterz@...radead.org,
        mingo@...hat.com, namhyung@...nel.org, jolsa@...nel.org,
        adrian.hunter@...el.com, john.g.garry@...cle.com, will@...nel.org,
        james.clark@....com, mike.leach@...aro.org,
        yuhaixin.yhx@...ux.alibaba.com, renyu.zj@...ux.alibaba.com,
        tmricht@...ux.ibm.com, ravi.bangoria@....com,
        linux-kernel@...r.kernel.org, linux-perf-users@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH V2 1/5] perf mem: Add mem_events into the supported
 perf_pmu

On Mon, Dec 11, 2023 at 02:01:37PM -0500, Liang, Kan wrote:

[...]

> > I will hold on a bit for the test until this patch set addresses the
> > concern for the breakage issues on Arm64. Please check my review in
> > other replies.
> 
> The reviews in the other replies don't look like break any current usage
> on Arm64. I think the breakage issue is what you described in this
> patch, right?

I mentioned the breakage is in the patch 04, but I think the concern
is dismissed.

> If we move the check of "arm_spe_0" to arch/arm/util/pmu.c, it seems we
> have to move the perf_mem_events_arm[] into arch/arm/util/mem-events.c
> as well. Is it OK?

No.  For fixing Arm64 building, please refer:

https://termbin.com/0dkn

> I'm not familiar with ARM and have no idea how those events are
> organized under arm64 and arm. Could you please send a fix for the
> building failure on aarch64? I will fold it into the V3.

After apply the change in above link on the top of your patch set,
it can build successfully at my side. Hope it's helpful.

Thanks,
Leo


> 
> Thanks,
> Kan
> > 
> > Thanks,
> > Leo
> > 

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