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Message-ID: <20231214150414.1849058-1-enachman@marvell.com>
Date: Thu, 14 Dec 2023 17:04:11 +0200
From: Elad Nachman <enachman@...vell.com>
To: <wim@...ux-watchdog.org>, <linux@...ck-us.net>,
<robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
<conor+dt@...nel.org>, <gregory.clement@...tlin.com>,
<chris.packham@...iedtelesis.co.nz>, <andrew@...n.ch>,
<fu.wei@...aro.org>, <Suravee.Suthikulpanit@....com>,
<al.stone@...aro.org>, <timur@...eaurora.org>,
<linux-watchdog@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
CC: <enachman@...vell.com>, <cyuval@...vell.com>
Subject: [PATCH 0/3] watchdog: sbsa_gwdt: add support for Marvell ac5
From: Elad Nachman <enachman@...vell.com>
Add support for Marvell ac5/x variant of the ARM
sbsa global watchdog. This watchdog deviates from
the standard driver by the following items:
1. Registers reside in secure register section.
hence access is only possible via SMC calls to ATF.
2. There are couple more registers which reside in
other register areas, which needs to be configured
in order for the watchdog to properly generate
reset through the SOC.
The new Marvell compatibility string differentiates between
the original sbsa mode of operation and the Marvell mode of
operation.
Elad Nachman (3):
dt-bindings: watchdog: add Marvell AC5 watchdog
arm64: dts: ac5: add watchdog nodes
watchdog: sbsa_gwdt: add support for Marvell ac5
.../bindings/watchdog/arm,sbsa-gwdt.yaml | 52 +++-
arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi | 14 +
arch/arm64/boot/dts/marvell/ac5-98dx35xx.dtsi | 8 +
drivers/watchdog/sbsa_gwdt.c | 247 ++++++++++++++++--
4 files changed, 298 insertions(+), 23 deletions(-)
--
2.25.1
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