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Message-ID: <fda32450-d83a-4ef9-bc24-1c2f8416ae45@linaro.org>
Date: Thu, 14 Dec 2023 16:13:36 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Elad Nachman <enachman@...vell.com>, wim@...ux-watchdog.org,
linux@...ck-us.net, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
gregory.clement@...tlin.com, chris.packham@...iedtelesis.co.nz,
andrew@...n.ch, fu.wei@...aro.org, Suravee.Suthikulpanit@....com,
al.stone@...aro.org, timur@...eaurora.org,
linux-watchdog@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: cyuval@...vell.com
Subject: Re: [PATCH 1/3] dt-bindings: watchdog: add Marvell AC5 watchdog
On 14/12/2023 16:04, Elad Nachman wrote:
> From: Elad Nachman <enachman@...vell.com>
>
> Add definitions and examples for Marvell AC5 variant
> of the sbsa watchdog.
> Marvell variant requires more memory definitions,
> since the initialization is more complex, and involves
> several register sets.
Please wrap commit message according to Linux coding style / submission
process (neither too early nor over the limit):
https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/submitting-patches.rst#L597
>
> Signed-off-by: Elad Nachman <enachman@...vell.com>
> ---
> .../bindings/watchdog/arm,sbsa-gwdt.yaml | 52 ++++++++++++++++++-
> 1 file changed, 50 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/watchdog/arm,sbsa-gwdt.yaml b/Documentation/devicetree/bindings/watchdog/arm,sbsa-gwdt.yaml
> index aa804f96acba..331e9aa7c2f7 100644
> --- a/Documentation/devicetree/bindings/watchdog/arm,sbsa-gwdt.yaml
> +++ b/Documentation/devicetree/bindings/watchdog/arm,sbsa-gwdt.yaml
> @@ -20,12 +20,17 @@ allOf:
>
> properties:
> compatible:
> - const: arm,sbsa-gwdt
> + enum:
> + - arm,sbsa-gwdt
> + - marvell,ac5-wd
>
> reg:
> items:
> - description: Watchdog control frame
> - description: Refresh frame
> + - description: Marvell CPU control frame
> + - description: Marvell Management frame
> + - description: Marvell reset control unit frame
You just broke all the users... I doubt this was tested on ARM platforms.
>
> interrupts:
> description: The Watchdog Signal 0 (WS0) SPI (Shared Peripheral Interrupt)
> @@ -39,12 +44,55 @@ required:
> unevaluatedProperties: false
>
> examples:
> + # First example is for generic ARM one
> + # Next examples are for Marvell.
One new example could be enough... but if it differs with one property,
also not that much of benefit.
> + # They are organized as three sets:
> + # first set is for global watchdog, then CPU core #0 private watchdog,
> + # and finally CPU core #1 private watchdog
> + # Examples are given for AC5 or Ironman. For AC5X SOC, the last
> + # reg item's low address (0x840F8000) should be replaced with 0x944F8000
> - |
> watchdog@...40000 {
> compatible = "arm,sbsa-gwdt";
> reg = <0x2a440000 0x1000>,
> - <0x2a450000 0x1000>;
> + <0x2a450000 0x1000>,
> + <0x0 0x0>,
> + <0x0 0x0>,
> + <0x0 0x0>;
No, drop.
> interrupts = <0 27 4>;
> timeout-sec = <30>;
> };
> + - |
> + watchdog@...16000 {
> + compatible = "marvell,ac5-wd";
> + reg = <0x80216000 0x1000>,
> + <0x80215000 0x1000>,
> + <0x80210000 0x1000>,
> + <0x7f900000 0x1000>,
> + <0x840F8000 0x1000>;
> + interrupts = <0 124 4>;
Use proper defines.
> + timeout-sec = <30>;
> + };
> + - |
> + watchdog@...12000 {
Drop example.
> + compatible = "marvell,ac5-wd";
> + reg = <0x80212000 0x1000>,
> + <0x80211000 0x1000>,
> + <0x80210000 0x1000>,
> + <0x7f900000 0x1000>,
> + <0x840F8000 0x1000>;
> + interrupts = <0 122 4>;
> + timeout-sec = <30>;
> + };
> + - |
> + watchdog@...14000 {
Drop example.
Best regards,
Krzysztof
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