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Message-ID: <CAPLW+4mpV0cy32MPS72-z=WYTZusnS7uTO7fbmOruVjAvcoBeA@mail.gmail.com>
Date: Thu, 14 Dec 2023 09:22:40 -0600
From: Sam Protsenko <semen.protsenko@...aro.org>
To: Tudor Ambarus <tudor.ambarus@...aro.org>
Cc: peter.griffin@...aro.org, robh+dt@...nel.org,
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Subject: Re: [PATCH 01/13] dt-bindings: clock: google,gs101: fix CMU_TOP gate
clock names
On Thu, Dec 14, 2023 at 9:16 AM Tudor Ambarus <tudor.ambarus@...aro.org> wrote:
>
>
>
> On 12/14/23 15:07, Sam Protsenko wrote:
> > On Thu, Dec 14, 2023 at 4:52 AM Tudor Ambarus <tudor.ambarus@...aro.org> wrote:
> >>
> >> The gs101 clock names are derived from the clock register names under
> >> some certain rules. In particular, for the gate clocks the following is
> >> documented and expected in the gs101 clock driver:
> >>
> >> Replace CLK_CON_GAT_CLKCMU with CLK_GOUT_CMU and gout_cmu
> >> Replace CLK_CON_GAT_GATE_CLKCMU with CLK_GOUT_CMU and gout_cmu
> >>
> >> For gates remove _UID _BLK _IPCLKPORT and _RSTNSYNC
> >>
> >
> > Doesn't it break existing gs101 device tree?
>
> No, compilation went fine at this point. The TOP gates are not used in
> the device tree at this point. And since the bindings patch was just
> applied I think we should fix it, so that we avoid name clashes as
> described below (I found a clash with a gate from PERIC0).
>
Ok, in that case feel free to add:
Reviewed-by: Sam Protsenko <semen.protsenko@...aro.org>
> >
> >> The CMU TOP gate clock names missed to include the required "CMU"
> >> differentiator which will cause name collisions with the gate clock names
> >> of other clock units. Fix the TOP gate clock names and include "CMU" in
> >> their name.
> >>
> >> Fixes: 0a910f160638 ("dt-bindings: clock: Add Google gs101 clock management unit bindings")
> >> Signed-off-by: Tudor Ambarus <tudor.ambarus@...aro.org>
> >> ---
> >
> > (snip)
>
> Thanks for the review!
> ta
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