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Message-ID: <CAPLW+4kzdsuHiPqFuCbgD+595Kg3+mM8ziXr+D3K0LvEQXF_rQ@mail.gmail.com>
Date:   Thu, 14 Dec 2023 09:42:53 -0600
From:   Sam Protsenko <semen.protsenko@...aro.org>
To:     Tudor Ambarus <tudor.ambarus@...aro.org>
Cc:     peter.griffin@...aro.org, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, mturquette@...libre.com,
        sboyd@...nel.org, conor+dt@...nel.org, andi.shyti@...nel.org,
        alim.akhtar@...sung.com, gregkh@...uxfoundation.org,
        jirislaby@...nel.org, catalin.marinas@....com, will@...nel.org,
        s.nawrocki@...sung.com, tomasz.figa@...il.com,
        cw00.choi@...sung.com, arnd@...db.de, andre.draszik@...aro.org,
        saravanak@...gle.com, willmcvicker@...gle.com,
        linux-arm-kernel@...ts.infradead.org,
        linux-samsung-soc@...r.kernel.org, linux-clk@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-i2c@...r.kernel.org, linux-serial@...r.kernel.org
Subject: Re: [PATCH 09/13] arm64: dts: exynos: gs101: update USI UART to use
 peric0 clocks

On Thu, Dec 14, 2023 at 4:53 AM Tudor Ambarus <tudor.ambarus@...aro.org> wrote:
>
> Get rid of the dummy clock and start using the cmu_peric0 clocks
> for the usi_uart and serial_0 nodes.
>
> Tested the serial at 115200, 1000000 and 3000000 baudrates,
> everthing went fine.
>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@...aro.org>
> ---
>  arch/arm64/boot/dts/exynos/google/gs101.dtsi | 14 ++++----------
>  1 file changed, 4 insertions(+), 10 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> index d0b0ad70c6ba..ffb7b4d89a8c 100644
> --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> @@ -180,14 +180,6 @@ HERA_CPU_SLEEP: cpu-hera-sleep {
>                 };
>         };
>
> -       /* TODO replace with CCF clock */
> -       dummy_clk: clock-3 {
> -               compatible = "fixed-clock";
> -               #clock-cells = <0>;
> -               clock-frequency = <12345>;
> -               clock-output-names = "pclk";
> -       };
> -
>         /* ect node is required to be present by bootloader */
>         ect {
>         };
> @@ -369,7 +361,8 @@ usi_uart: usi@...000c0 {
>                         ranges;
>                         #address-cells = <1>;
>                         #size-cells = <1>;
> -                       clocks = <&dummy_clk>, <&dummy_clk>;
> +                       clocks = <&cmu_peric0 CLK_GOUT_PERIC0_CLK_PERIC0_USI0_UART_CLK>,
> +                                <&cmu_peric0 CLK_DOUT_PERIC0_USI0_UART>;

Why using DIV clock here? Usually all leaf clocks are GATE clocks (at
least it's so in Exynos850).

>                         clock-names = "pclk", "ipclk";
>                         samsung,sysreg = <&sysreg_peric0 0x1020>;
>                         samsung,mode = <USI_V2_UART>;
> @@ -381,7 +374,8 @@ serial_0: serial@...00000 {
>                                 reg-io-width = <4>;
>                                 interrupts = <GIC_SPI 634
>                                               IRQ_TYPE_LEVEL_HIGH 0>;
> -                               clocks = <&dummy_clk 0>, <&dummy_clk 0>;
> +                               clocks = <&cmu_peric0 CLK_GOUT_PERIC0_CLK_PERIC0_USI0_UART_CLK>,
> +                                        <&cmu_peric0 CLK_DOUT_PERIC0_USI0_UART>;

Ditto.

>                                 clock-names = "uart", "clk_uart_baud0";
>                                 samsung,uart-fifosize = <256>;
>                                 status = "disabled";
> --
> 2.43.0.472.g3155946c3a-goog
>

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