linux-kernel - [PATCH 10/11] crypto: qce - Add support for lock/unlock in sha

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Message-Id: <20231214114239.2635325-11-quic_mdalam@quicinc.com>
Date:   Thu, 14 Dec 2023 17:12:38 +0530
From:   Md Sadre Alam <quic_mdalam@...cinc.com>
To:     thara.gopinath@...il.com, herbert@...dor.apana.org.au,
        davem@...emloft.net, agross@...nel.org, andersson@...nel.org,
        konrad.dybcio@...aro.org, vkoul@...nel.org,
        linux-crypto@...r.kernel.org, linux-arm-msm@...r.kernel.org,
        linux-kernel@...r.kernel.org, dmaengine@...r.kernel.org,
        quic_srichara@...cinc.com, quic_varada@...cinc.com
Cc:     quic_mdalam@...cinc.com
Subject: [PATCH 10/11] crypto: qce - Add support for lock/unlock in sha

Add support for lock/unlock on bam pipe in sha.
If multiple EE's(Execution Environment) try to access
the same crypto engine then before accessing the crypto
engine EE's has to lock the bam pipe and then submit the
request to crypto engine. Once request done then EE's has
to unlock the bam pipe so that others EE's can access the
crypto engine.

Signed-off-by: Md Sadre Alam <quic_mdalam@...cinc.com>
---
 drivers/crypto/qce/sha.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/crypto/qce/sha.c b/drivers/crypto/qce/sha.c
index f850c6206a31..942aecbb0736 100644
--- a/drivers/crypto/qce/sha.c
+++ b/drivers/crypto/qce/sha.c
@@ -47,6 +47,8 @@ static void qce_ahash_done(void *data)
 	int error;
 	u32 status;
 
+	qce_bam_release_lock(qce);
+
 	error = qce_dma_terminate_all(&qce->dma);
 	if (error)
 		dev_dbg(qce->dev, "ahash dma termination error (%d)\n", error);
@@ -102,6 +104,8 @@ static int qce_ahash_async_req_handle(struct crypto_async_request *async_req)
 		rctx->authklen = AES_KEYSIZE_128;
 	}
 
+	qce_bam_acquire_lock(qce);
+
 	rctx->src_nents = sg_nents_for_len(req->src, req->nbytes);
 	if (rctx->src_nents < 0) {
 		dev_err(qce->dev, "Invalid numbers of src SG.\n");
-- 
2.34.1