linux-kernel - RE: [PATCH v3 2/2] Add GPIO support for Realtek DHC(Digital Home Center) RTD SoCs.

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Date: Fri, 15 Dec 2023 03:29:48 +0000
From: TY_Chang[張子逸] <tychang@...ltek.com>
To: Andy Shevchenko <andy@...nel.org>, Michael Walle <michael@...le.cc>
CC: Linus Walleij <linus.walleij@...aro.org>,
        Bartosz Golaszewski
	<brgl@...ev.pl>, Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski
	<krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v3 2/2] Add GPIO support for Realtek DHC(Digital Home Center) RTD SoCs.

Hi Andy,

>> >> >> +     if (irq == data->irqs[0])
>> >> >> +             get_reg_offset = &rtd_gpio_gpa_offset;
>> >> >> +     else if (irq == data->irqs[1])
>> >> >> +             get_reg_offset = &rtd_gpio_gpda_offset;
>> >> >
>> >> >Can't it be done before entering into chained IRQ handler?
>> >>
>> >> I will revise it.
>> >
>> >Thinking about this more, perhaps you can register two IRQ chips with
>> >different functions, so this won't be part of the very critical
>> >interrupt handler (as we all want to reduce overhead in it as much as
>possible).
>> >Anyway, think about this and try different options, choose the one
>> >you think the best.
>>
>> In the previous patch (v1), I had registered two IRQ chips with
>> different handlers. However, these two handlers appeared quite similar
>> and the gpio_irq_chip only allows the registration of a single
>> handler. Therefore, I ended up registering one handler for both IRQs
>> and included conditional checks within the handler to differentiate between
>the two.
>
>What is the performance impact that you have that condition in the interrupt
>handler?
>

I believe the performance impact is minimal since this conditional check is
a simple operation aimed at retrieving the corresponding offset of the
interrupt status registers.
Or is there something I might not have considered?

Thanks,
Tzuyi Chang