linux-kernel - Re: [PATCH 0/2] Allow disabling USB3 ports in xHCI/DWC3

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <edf15619-8f31-2a30-d92e-997bc1464c58@gmail.com>
Date: Fri, 15 Dec 2023 14:59:56 -0700
From: Sam Edwards <cfsworks@...il.com>
To: Mathias Nyman <mathias.nyman@...ux.intel.com>,
 Mathias Nyman <mathias.nyman@...el.com>,
 Thinh Nguyen <Thinh.Nguyen@...opsys.com>
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
 Heiko Stuebner <heiko@...ech.de>, linux-usb@...r.kernel.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/2] Allow disabling USB3 ports in xHCI/DWC3

Hi Mathias,

On 12/14/23 04:05, Mathias Nyman wrote:
> I don't think this will work as a generic xhci driver feature.
> 
> Even if we ignore all USB3 ports in software they will for most xHC 
> hosts be powered
> and enabled in hardware by default after controller reset.
> 
> This means they perform link training, generate all kinds of events with 
> interrupts
> (connect, over-current etc) that driver now can't handle.

By this do you mean that having the xHCI driver ignore the USB3 ports 
isn't enough to ensure that PP=0 (and the driver would need to do a 
little bit more to make sure that the "parking brake" is on: e.g. 
initialize, but not use, the ports) or that the xHC's PP=0 signal isn't 
sufficient to keep the PHYs from trying to bring the link up and 
generating those interrupts (PP=0 really isn't enough, and there is no 
general "parking brake" to be found here)?

> Sound like the setup you are using has a very specific issue, and it 
> would need
> a narrow targeted quirk to solve it.

I infer from this that you're against having a DT property added to 
xHCI? What if the property were to be narrowed in scope to "ignore the 
USB3 PHYs, they're disabled/absent" vs. this iteration's "disable the 
USB3 ports" meaning?

If this quirk ends up landing in the dwc3 driver (since, arguably, DWC3 
is the real misbehaving hw block in these circumstances), what would be 
your preferred mechanism of signaling to the xHCI layer "the USB3 PHYs 
have been disabled; please ignore"?

> 
>>
>> There are other ways to disable the USB3 ports on RK3588, such as via 
>> some
>> syscon registers. I figured I would start with the most general solution
>> (benefitting other SoCs) first, getting more specific only if 
>> necessary. :)
> 
> To me a specific solution to a specific problem like this sounds better.

I am starting to think so as well. I may shift my focus to DWC3 (with 
xHCI driver changes made only to facilitate them) for now, since 
`maximum-speed = "high-speed";` very reasonably (imo) should prevent 
registering the usb3 rhub -- though something may convince me otherwise 
in the near future. :)

> Thanks
> Mathias

Thanks to you as well, this is exactly the type of feedback I was 
fishing for!

Cheers,
Sam