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Message-Id: <20231215-ad7380-mainline-v3-1-7a11ebf642b9@baylibre.com>
Date: Fri, 15 Dec 2023 04:32:02 -0600
From: David Lechner <dlechner@...libre.com>
To: linux-iio@...r.kernel.org,
linux-spi@...r.kernel.org,
devicetree@...r.kernel.org
Cc: David Lechner <dlechner@...libre.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Jonathan Cameron <jic23@...nel.org>,
Michael Hennerich <michael.hennerich@...log.com>,
Nuno Sá <nuno.sa@...log.com>,
Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>,
linux-kernel@...r.kernel.org
Subject: [PATCH v3 1/3] dt-bindings: spi: add spi-rx-bus-channels peripheral property
This adds a new spi-rx-bus-channels property to the generic spi
peripheral property bindings. This property is used to describe
devices that have parallel data output channels.
This property is different from spi-rx-bus-width in that the latter
means that we are reading multiple bits of a single word at one time
while the former means that we are reading single bits of multiple words
at the same time.
Signed-off-by: David Lechner <dlechner@...libre.com>
---
The rest of this series is ready to merge, so just looking for an ack from
Mark on this one.
.../devicetree/bindings/spi/spi-peripheral-props.yaml | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
index 15938f81fdce..1c8e71c18234 100644
--- a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
+++ b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
@@ -67,6 +67,18 @@ properties:
enum: [0, 1, 2, 4, 8]
default: 1
+ spi-rx-bus-channels:
+ description:
+ The number of parallel channels for read transfers. The difference between
+ this and spi-rx-bus-width is that a value N for spi-rx-bus-channels means
+ the SPI bus is receiving one bit each of N different words at the same
+ time whereas a value M for spi-rx-bus-width means that the bus is
+ receiving M bits of a single word at the same time. It is also possible to
+ use both properties at the same time, meaning the bus is receiving M bits
+ of N different words at the same time.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ default: 1
+
spi-rx-delay-us:
description:
Delay, in microseconds, after a read transfer.
--
2.34.1
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