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Message-ID: <ZX0MzT5jX_s_m_1Y@radian>
Date: Fri, 15 Dec 2023 21:34:53 -0500
From: Richard Acayan <mailingradian@...il.com>
To: Johan Hovold <johan+linaro@...nel.org>
Cc: Bjorn Andersson <andersson@...nel.org>, Andy Gross <agross@...nel.org>,
	Konrad Dybcio <konrad.dybcio@...aro.org>,
	Rob Herring <robh+dt@...nel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Krishna Kurapati PSSNV <quic_kriskura@...cinc.com>,
	linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, stable@...r.kernel.org
Subject: Re: [PATCH 1/3] arm64: dts: qcom: sdm670: fix USB DP/DM HS PHY
 interrupts

On Thu, Dec 14, 2023 at 08:43:17AM +0100, Johan Hovold wrote:
> The USB DP/DM HS PHY interrupts need to be provided by the PDC interrupt
> controller in order to be able to wake the system up from low-power
> states and to be able to detect disconnect events, which requires
> triggering on falling edges.
>
> A recent commit updated the trigger type but failed to change the
> interrupt provider as required. This leads to the current Linux driver
> failing to probe instead of printing an error during suspend and USB
> wakeup not working as intended.
>
> Fixes: de3b3de30999 ("arm64: dts: qcom: sdm670: fix USB wakeup interrupt types")
> Fixes: 07c8ded6e373 ("arm64: dts: qcom: add sdm670 and pixel 3a device trees")
> Cc: stable@...r.kernel.org      # 6.2

I almost forgot to mention, both SDM670 patches seem to depend on
b51ee205dc4f ("arm64: dts: qcom: sdm670: Add PDC") in 6.6 to compile
properly.

> Cc: Richard Acayan <mailingradian@...il.com>
> Signed-off-by: Johan Hovold <johan+linaro@...nel.org>
> ---
>  arch/arm64/boot/dts/qcom/sdm670.dtsi | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
> index c873560ae9d5..fe4067c012a0 100644
> --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
> @@ -1295,10 +1295,10 @@ usb_1: usb@...8800 {
>  					  <&gcc GCC_USB30_PRIM_MASTER_CLK>;
>  			assigned-clock-rates = <19200000>, <150000000>;
>  
> -			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
> -				     <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
> -				     <GIC_SPI 488 IRQ_TYPE_EDGE_BOTH>,
> -				     <GIC_SPI 489 IRQ_TYPE_EDGE_BOTH>;
> +			interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
> +					      <&intc GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
> +					      <&pdc 8 IRQ_TYPE_EDGE_BOTH>,
> +					      <&pdc 9 IRQ_TYPE_EDGE_BOTH>;
>  			interrupt-names = "hs_phy_irq", "ss_phy_irq",
>  					  "dm_hs_phy_irq", "dp_hs_phy_irq";
>  
> -- 
> 2.41.0
>

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