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Message-ID: <993d76c7-ceab-4381-b63e-794c77f7d0df@linaro.org>
Date: Sat, 16 Dec 2023 14:35:45 +0100
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Abel Vesa <abel.vesa@...aro.org>, Andy Gross <agross@...nel.org>,
 Bjorn Andersson <andersson@...nel.org>,
 Michael Turquette <mturquette@...libre.com>, Stephen Boyd
 <sboyd@...nel.org>, Rob Herring <robh+dt@...nel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
 Conor Dooley <conor+dt@...nel.org>, Philipp Zabel <p.zabel@...gutronix.de>,
 Neil Armstrong <neil.armstrong@...aro.org>,
 Vladimir Zapolskiy <vladimir.zapolskiy@...aro.org>,
 Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Cc: linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
 linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
 Rajendra Nayak <quic_rjendra@...cinc.com>
Subject: Re: [PATCH v2 08/10] clk: qcom: Add GPU clock driver for x1e80100

On 14.12.2023 17:49, Abel Vesa wrote:
> From: Rajendra Nayak <quic_rjendra@...cinc.com>
> 
> Add Graphics Clock Controller (GPUCC) support for X1E80100 platform.
> 
> Signed-off-by: Rajendra Nayak <quic_rjendra@...cinc.com>
> Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
> ---
[...]

I see no usage of clk_branch2_aon_ops, is that intended?

[...]

> +static struct gdsc gpu_cc_cx_gdsc = {
> +	.gdscr = 0x9108,
> +	.gds_hw_ctrl = 0x953c,
> +	.en_rest_wait_val = 0x2,
> +	.en_few_wait_val = 0x2,
> +	.clk_dis_wait_val = 0xf,
> +	.pd = {
> +		.name = "gpu_cc_cx_gdsc",
> +	},
> +	.pwrsts = PWRSTS_OFF_ON,
> +	.flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
That's.. unusual..

Can you doublecheck these flags?


> +
> +	/*
> +	 * Keep clocks always enabled:
> +	 *	gpu_cc_cb_clk
> +	 */
> +	regmap_update_bits(regmap, 0x93a4, BIT(0), BIT(0));
Please make the comment inline, so:

regmap_update_bits(regmap, 0x93a4, BIT(0), BIT(0)); /* GPU_CC_CB_CLK */

I have submitted another series cleaning this up and adding a helper

Konrad

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