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Message-ID: <20231216213121.GB3302836@rocinante>
Date: Sun, 17 Dec 2023 06:31:21 +0900
From: Krzysztof WilczyĆski <kw@...ux.com>
To: Thippeswamy Havalige <thippeswamy.havalige@....com>
Cc: linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
bhelgaas@...gle.com, lpieralisi@...nel.org, robh@...nel.org,
krzysztof.kozlowski+dt@...aro.org, colnor+dt@...nel.org,
michal.simek@....com, bharat.kumar.gogada@....com
Subject: Re: [PATCH v5 RESEND 0/4] increase ecam size value to discover 256
buses during
Hello,
> Current driver is supports up to 16 buses. The following code fixes
> to support up to 256 buses.
>
> update "NWL_ECAM_VALUE_DEFAULT " to 16 can access up to 256MB ECAM
> region to detect 256 buses.
>
> Update ecam size to 256MB in device tree binding example.
>
> Remove unwanted code.
Applied to controller/xilinx-ecam, thank you!
[01/04] PCI: xilinx-nwl: Remove redundant code that sets Type 1 header fields
https://git.kernel.org/pci/pci/c/a2492ff1fcb9
[02/04] dt-bindings: PCI: xilinx-nwl: Modify ECAM size in the DT example
https://git.kernel.org/pci/pci/c/22f38a244273
[03/04] PCI: xilinx-nwl: Rename the NWL_ECAM_VALUE_DEFAULT macro
https://git.kernel.org/pci/pci/c/177692115f6f
[04/04] PCI: xilinx-nwl: Modify ECAM size to enable support for 256 buses
https://git.kernel.org/pci/pci/c/2fccd11518f1
Krzysztof
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