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Message-Id: <20231217110952.78784-2-qiujingbao.dlmu@gmail.com>
Date: Sun, 17 Dec 2023 19:09:50 +0800
From: Jingbao Qiu <qiujingbao.dlmu@...il.com>
To: a.zummo@...ertech.it,
	alexandre.belloni@...tlin.com,
	robh+dt@...nel.org,
	krzysztof.kozlowski+dt@...aro.org,
	conor@...nel.org,
	conor+dt@...nel.org,
	chao.wei@...hgo.com,
	unicorn_wang@...look.com,
	paul.walmsley@...ive.com,
	palmer@...belt.com,
	aou@...s.berkeley.edu
Cc: linux-rtc@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	dlan@...too.org,
	Jingbao Qiu <qiujingbao.dlmu@...il.com>
Subject: [PATCH v2 1/3] dt-bindings: rtc: sophgo: add RTC support for Sophgo CV1800 series SoC

Add devicetree binding for Sophgo CV1800 SoC.

Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@...il.com>
---
 .../bindings/rtc/sophgo,cv1800-rtc.yaml       | 47 +++++++++++++++++++
 1 file changed, 47 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml

diff --git a/Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml b/Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml
new file mode 100644
index 000000000000..a9e1dcc2a5be
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/rtc/sophgo,cv1800-rtc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Real Time Clock of the Sophgo CV1800 SoC
+
+maintainers:
+  - Jingbao Qiu <qiujingbao.dlmu@...il.com>
+
+allOf:
+  - $ref: rtc.yaml#
+
+properties:
+  compatible:
+    const: sophgo,cv1800-rtc
+
+  reg:
+    items:
+      - description: data register
+      - description: control register
+
+  clocks:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - interrupts
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    rtc@...5000{
+      compatible = "sophgo,cv1800-rtc";
+      reg = <0x5025000 0x1000>, <0x5026000 0x1000>;
+      clocks = <&osc>;
+      interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
+    };
-- 
2.25.1


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