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Message-Id: <20231218-pinephone-pll-fixes-v1-2-e238b6ed6dc1@oltmanns.dev>
Date: Mon, 18 Dec 2023 14:35:20 +0100
From: Frank Oltmanns <frank@...manns.dev>
To: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...il.com>,
Samuel Holland <samuel@...lland.org>,
Guido Günther <agx@...xcpu.org>,
Purism Kernel Team <kernel@...i.sm>, Ondrej Jirman <megi@....cz>,
Neil Armstrong <neil.armstrong@...aro.org>,
Jessica Zhang <quic_jesszhan@...cinc.com>, Sam Ravnborg <sam@...nborg.org>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>,
David Airlie <airlied@...il.com>, Daniel Vetter <daniel@...ll.ch>
Cc: linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-sunxi@...ts.linux.dev, linux-kernel@...r.kernel.org,
dri-devel@...ts.freedesktop.org, Frank Oltmanns <frank@...manns.dev>
Subject: [PATCH 2/5] clk: sunxi-ng: a64: Add constraints on PLL-MIPI's n/m
ratio and parent rate
The Allwinner A64 manual lists the following constraints for the
PLL-MIPI clock:
- M/N >= 3
- (PLL_VIDEO0)/M >= 24MHz
Use these constraints.
Signed-off-by: Frank Oltmanns <frank@...manns.dev>
---
drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
index 8951ffc14ff5..c034ac027d1c 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
@@ -176,6 +176,8 @@ static struct ccu_nkm pll_mipi_clk = {
.n = _SUNXI_CCU_MULT(8, 4),
.k = _SUNXI_CCU_MULT_MIN(4, 2, 2),
.m = _SUNXI_CCU_DIV(0, 4),
+ .max_mn_ratio = 3,
+ .parent_wo_nk = 24000000,
.common = {
.reg = 0x040,
.hw.init = CLK_HW_INIT("pll-mipi", "pll-video0",
--
2.43.0
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