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Message-ID: <CAEnQRZDHrihcP5TGLWKTYW=C27XSrBis7pLd2nMrQ2byJQhAJg@mail.gmail.com>
Date: Tue, 19 Dec 2023 10:31:00 +0200
From: Daniel Baluta <daniel.baluta@...il.com>
To: Shengjiu Wang <shengjiu.wang@....com>
Cc: shengjiu.wang@...il.com, Xiubo.Lee@...il.com, festevam@...il.com, 
	nicoleotsuka@...il.com, lgirdwood@...il.com, broonie@...nel.org, 
	perex@...ex.cz, tiwai@...e.com, alsa-devel@...a-project.org, 
	linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org, 
	linux-sound@...r.kernel.org
Subject: Re: [PATCH v2] ASoC: fsl_sai: Fix channel swap issue on i.MX8MP

On Tue, Dec 19, 2023 at 5:12 AM Shengjiu Wang <shengjiu.wang@....com> wrote:
>
> When flag mclk_with_tere and mclk_direction_output enabled,
> The SAI transmitter or receiver will be enabled in very early
> stage, that if FSL_SAI_xMR is set by previous case,
> for example previous case is one channel, current case is
> two channels, then current case started with wrong xMR in
> the beginning, then channel swap happen.
>
> The patch is to clear xMR in hw_free() to avoid such
> channel swap issue.
>
> Fixes: 3e4a82612998 ("ASoC: fsl_sai: MCLK bind with TX/RX enable bit")
> Signed-off-by: Shengjiu Wang <shengjiu.wang@....com>

Reviewed-by: Daniel Baluta <daniel.baluta@....com>

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