linux-kernel - Re: [PATCH v3 36/50] ARM: at91: add support in SoC driver for new sam9x7

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Message-ID: <e4481634-d0b4-427d-a9a2-f3fe5643f2e6@microchip.com>
Date: Tue, 19 Dec 2023 11:11:21 +0100
From: Nicolas Ferre <nicolas.ferre@...rochip.com>
To: Varshini Rajendran <varshini.rajendran@...rochip.com>,
	<alexandre.belloni@...tlin.com>, <claudiu.beznea@...rochip.com>,
	<mihai.sain@...rochip.com>, <linux-arm-kernel@...ts.infradead.org>,
	<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 36/50] ARM: at91: add support in SoC driver for new
 sam9x7

On 28/07/2023 at 12:29, Varshini Rajendran wrote:
> Add support for SAM9X7 SoC in the SoC driver.
> 
> Signed-off-by: Varshini Rajendran <varshini.rajendran@...rochip.com>
> Reviewed-by: Claudiu Beznea <claudiu.beznea@...rochip.com>
> ---
>   drivers/soc/atmel/soc.c | 23 +++++++++++++++++++++++
>   drivers/soc/atmel/soc.h |  9 +++++++++
>   2 files changed, 32 insertions(+)
> 
> diff --git a/drivers/soc/atmel/soc.c b/drivers/soc/atmel/soc.c
> index cc9a3e107479..cae3452cbc60 100644
> --- a/drivers/soc/atmel/soc.c
> +++ b/drivers/soc/atmel/soc.c
> @@ -101,6 +101,29 @@ static const struct at91_soc socs[] __initconst = {
>   		 AT91_CIDR_VERSION_MASK, SAM9X60_D6K_EXID_MATCH,
>   		 "sam9x60 8MiB SDRAM SiP", "sam9x60"),
>   #endif
> +#ifdef CONFIG_SOC_SAM9X7
> +	AT91_SOC(SAM9X7_CIDR_MATCH, AT91_CIDR_MATCH_MASK,
> +		 AT91_CIDR_VERSION_MASK, SAM9X75_EXID_MATCH,
> +		 "sam9x75", "sam9x7"),
> +	AT91_SOC(SAM9X7_CIDR_MATCH, AT91_CIDR_MATCH_MASK,
> +		 AT91_CIDR_VERSION_MASK, SAM9X72_EXID_MATCH,
> +		 "sam9x72", "sam9x7"),
> +	AT91_SOC(SAM9X7_CIDR_MATCH, AT91_CIDR_MATCH_MASK,
> +		 AT91_CIDR_VERSION_MASK, SAM9X70_EXID_MATCH,
> +		 "sam9x70", "sam9x7"),
> +	AT91_SOC(SAM9X7_CIDR_MATCH, SAM9X75_D1G_EXID_MATCH,
> +		 AT91_CIDR_VERSION_MASK, SAM9X75_EXID_MATCH,
> +		 "sam9x75 1Gb DDR3L SiP ", "sam9x7"),

I don't want that we introduce more sizes in "bits" instead of "bytes" 
in this file.
I know it's what is advertised in datasheets, but we're software people 
who count these sizes in bytes, so let's do the conversion for the users.

BTW: this file will need to be updated with this statement in mind.

Best regards,
   Nicolas

> +	AT91_SOC(SAM9X7_CIDR_MATCH, SAM9X75_D5M_EXID_MATCH,
> +		 AT91_CIDR_VERSION_MASK, SAM9X75_EXID_MATCH,
> +		 "sam9x75 512Mb DDR2 SiP", "sam9x7"),
> +	AT91_SOC(SAM9X7_CIDR_MATCH, SAM9X75_D1M_EXID_MATCH,
> +		 AT91_CIDR_VERSION_MASK, SAM9X75_EXID_MATCH,
> +		 "sam9x75 128Mb DDR2 SiP", "sam9x7"),
> +	AT91_SOC(SAM9X7_CIDR_MATCH, SAM9X75_D2G_EXID_MATCH,
> +		 AT91_CIDR_VERSION_MASK, SAM9X75_EXID_MATCH,
> +		 "sam9x75 2Gb DDR3L SiP", "sam9x7"),
> +#endif
>   #ifdef CONFIG_SOC_SAMA5
>   	AT91_SOC(SAMA5D2_CIDR_MATCH, AT91_CIDR_MATCH_MASK,
>   		 AT91_CIDR_VERSION_MASK, SAMA5D21CU_EXID_MATCH,
> diff --git a/drivers/soc/atmel/soc.h b/drivers/soc/atmel/soc.h
> index 7a9f47ce85fb..26dd26b4f179 100644
> --- a/drivers/soc/atmel/soc.h
> +++ b/drivers/soc/atmel/soc.h
> @@ -45,6 +45,7 @@ at91_soc_init(const struct at91_soc *socs);
>   #define AT91SAM9N12_CIDR_MATCH		0x019a07a0
>   #define SAM9X60_CIDR_MATCH		0x019b35a0
>   #define SAMA7G5_CIDR_MATCH		0x00162100
> +#define SAM9X7_CIDR_MATCH		0x09750020

Apha-numerial order please.

>   
>   #define AT91SAM9M11_EXID_MATCH		0x00000001
>   #define AT91SAM9M10_EXID_MATCH		0x00000002
> @@ -74,6 +75,14 @@ at91_soc_init(const struct at91_soc *socs);
>   #define SAMA7G54_D2G_EXID_MATCH		0x00000020
>   #define SAMA7G54_D4G_EXID_MATCH		0x00000028
>   
> +#define SAM9X75_EXID_MATCH		0x00000000
> +#define SAM9X72_EXID_MATCH		0x00000004
> +#define SAM9X70_EXID_MATCH		0x00000005
> +#define SAM9X75_D1G_EXID_MATCH		0x00000001
> +#define SAM9X75_D5M_EXID_MATCH		0x00000002
> +#define SAM9X75_D1M_EXID_MATCH		0x00000003
> +#define SAM9X75_D2G_EXID_MATCH		0x00000006
> +

Ditto

>   #define AT91SAM9XE128_CIDR_MATCH	0x329973a0
>   #define AT91SAM9XE256_CIDR_MATCH	0x329a93a0
>   #define AT91SAM9XE512_CIDR_MATCH	0x329aa3a0