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Message-ID: <cdde7597-2c1c-4570-a604-91b87eef9455@quicinc.com>
Date: Tue, 19 Dec 2023 08:14:39 +0800
From: Tao Zhang <quic_taozha@...cinc.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
Mathieu Poirier
<mathieu.poirier@...aro.org>,
Suzuki K Poulose <suzuki.poulose@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Konrad Dybcio
<konradybcio@...il.com>,
Mike Leach <mike.leach@...aro.org>, Rob Herring
<robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
CC: Jinlong Mao <quic_jinlmao@...cinc.com>, Leo Yan <leo.yan@...aro.org>,
"Greg Kroah-Hartman" <gregkh@...uxfoundation.org>,
<coresight@...ts.linaro.org>, <linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
Tingwei Zhang
<quic_tingweiz@...cinc.com>,
Yuanfang Zhang <quic_yuanfang@...cinc.com>,
Trilok Soni <quic_tsoni@...cinc.com>,
Song Chai <quic_songchai@...cinc.com>, <linux-arm-msm@...r.kernel.org>,
<andersson@...nel.org>
Subject: Re: [PATCH v3 1/8] dt-bindings: arm: Add support for CMB element size
On 11/21/2023 3:24 PM, Krzysztof Kozlowski wrote:
> On 21/11/2023 03:24, Tao Zhang wrote:
>> Add property "qcom,cmb-elem-size" to support CMB(Continuous
>> Multi-Bit) element for TPDM. The associated aggregator will read
>> this size before it is enabled. CMB element size currently only
>> supports 32-bit and 64-bit.
>
>> qcom,dsb-msrs-num:
>> description:
>> Specifies the number of DSB(Discrete Single Bit) MSR(mux select register)
>> @@ -110,4 +119,23 @@ examples:
>> };
>> };
>>
>> + tpdm@...9000 {
>> + compatible = "qcom,coresight-tpdm", "arm,primecell";
>> + reg = <0x06c29000 0x1000>;
>> + reg-names = "tpdm-base";
>> +
>> + qcom,cmb-element-size = /bits/ 8 <64>;
> One new property usually does not justify new example. Why it cannot be
> added to existing example?
Because the existing example tpdm "tpdm@...c000" which only supports dsb
sub-unit. Most
TPDMs only support one type of sub-unit.
>
> Anyway, I prefer not to take any new Qualcomm Coresight bindings or
> Qualcomm SoC DTS nodes with Coresight till we fix all existing warnings.
> I don't know how to fix them, so I need help with them. No such fixing
> happened so far from Qcom, so pushback is my only way to get any attention.
>
> I already commented on this in other email thread.
Jinlong has fixed the warnings from coresight bindings. I will prepare
my next patch
series soon.
Best,
Tao
>
> Best regards,
> Krzysztof
>
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