linux-kernel - Re: [PATCH 3/3] perf scripts python: arm-cs-trace-disasm.py: do not ignore disam first sample

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Date: Wed, 20 Dec 2023 11:15:37 +0000
From: James Clark <james.clark@....com>
To: Ruidong Tian <tianruidong@...ux.alibaba.com>, linux-kernel@...r.kernel.org
Cc: coresight@...ts.linaro.org, suzuki.poulose@....com,
 mike.leach@...aro.org, alexander.shishkin@...ux.intel.com,
 linux-arm-kernel@...ts.infradead.org, adrian.hunter@...el.com,
 linux-perf-users@...r.kernel.org, leo.yan@...aro.org, al.grant@....com,
 mathieu.poirier@...aro.org, tor@...com, acme@...hat.com
Subject: Re: [PATCH 3/3] perf scripts python: arm-cs-trace-disasm.py: do not
 ignore disam first sample



On 14/12/2023 12:33, Ruidong Tian wrote:
> arm-cs-trace-disasm ignore disam the first branch sample, For example as
> follow, the instructions beteween 0x0000ffffae878750 and
> 0x0000ffffae878754 is lose:
> 
>   ARM CoreSight Trace Data Assembler Dump
>   Event type: branches:uH
>   Sample = { cpu: 0000 addr: 0x0000ffffae878750 phys_addr: 0x0000000000000000 ip: 0x0000000000000000 pid: 4003489 tid: 4003489 period: 1 time: 26765151766034 }
>   Event type: branches:uH
>   Sample = { cpu: 0000 addr: 0x0000000000000000 phys_addr: 0x0000000000000000 ip: 0x0000ffffae878754 pid: 4003489 tid: 4003489 period: 1 time: 26765151766034 }
> 
> Initialize cpu_data earlier to fix it:
> 
>   ARM CoreSight Trace Data Assembler Dump
>   Event type: branches:uH
>   Sample = { cpu: 0000 addr: 0x0000000000000000 phys_addr: 0x0000000000000000 ip: 0x0000ffffae878754 pid: 4003489 tid: 4003489 period: 1 time: 26765151766034 }
>         0000000000028740 <ioctl>: (base address is 0x0000ffffae850000)
>            28750: b13ffc1f      cmn     x0, #4095
>            28754: 54000042      b.hs    0x2875c <ioctl+0x1c>
>             test 4003489/4003489 [0000]     26765.151766034  __GI___ioctl+0x14                        /usr/lib64/libc-2.32.so
>   Event type: branches:uH
>   Sample = { cpu: 0000 addr: 0x0000ffffa67535ac phys_addr: 0x0000000000000000 ip: 0x0000000000000000 pid: 4003489 tid: 4003489 period: 1 time: 26765151766034 }
> 
> Signed-off-by: Ruidong Tian <tianruidong@...ux.alibaba.com>

I noticed that this is for the missing second branch sample. Technically
the first one is also still missing, but it doesn't have the origin set,
only the destination, so I'm not sure if we need to do anything with it,
but the first one always looks like this:

  0 [unknown] ([unknown]) =>     ffff8a3b9100 _start+0x0

Followed by this one which you now generate the disassembly for:

  ffff8a3b9104 _start+0x4 (ld-2.31.so) => ffff8a3b9b80 _dl_start+0x0

Either way:

Reviewed-by: James Clark <james.clark@....com>

> ---
>  .../scripts/python/arm-cs-trace-disasm.py     | 21 ++++++++++---------
>  1 file changed, 11 insertions(+), 10 deletions(-)
> 
> diff --git a/tools/perf/scripts/python/arm-cs-trace-disasm.py b/tools/perf/scripts/python/arm-cs-trace-disasm.py
> index c9e14af5b58c..b1eb4293cbef 100755
> --- a/tools/perf/scripts/python/arm-cs-trace-disasm.py
> +++ b/tools/perf/scripts/python/arm-cs-trace-disasm.py
> @@ -190,6 +190,17 @@ def process_event(param_dict):
>  	dso_end = get_optional(param_dict, "dso_map_end")
>  	symbol = get_optional(param_dict, "symbol")
>  
> +	cpu = sample["cpu"]
> +	ip = sample["ip"]
> +	addr = sample["addr"]
> +
> +	# Initialize CPU data if it's empty, and directly return back
> +	# if this is the first tracing event for this CPU.
> +	if (cpu_data.get(str(cpu) + 'addr') == None):
> +		cpu_data[str(cpu) + 'addr'] = addr
> +		return
> +
> +
>  	if (options.verbose == True):
>  		print("Event type: %s" % name)
>  		print_sample(sample)
> @@ -211,16 +222,6 @@ def process_event(param_dict):
>  	if (name[0:8] != "branches"):
>  		return
>  
> -	cpu = sample["cpu"]
> -	ip = sample["ip"]
> -	addr = sample["addr"]
> -
> -	# Initialize CPU data if it's empty, and directly return back
> -	# if this is the first tracing event for this CPU.
> -	if (cpu_data.get(str(cpu) + 'addr') == None):
> -		cpu_data[str(cpu) + 'addr'] = addr
> -		return
> -
>  	# The format for packet is:
>  	#
>  	#		  +------------+------------+------------+