linux-kernel - Re: [PATCH v1 1/2] dt-bindings: w1: UART 1-wire bus

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date: Thu, 21 Dec 2023 14:59:58 -0600
From: Rob Herring <robh@...nel.org>
To: Christoph Winklhofer <cj.winklhofer@...il.com>
Cc: krzysztof.kozlowski@...aro.org, conor+dt@...nel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1 1/2] dt-bindings: w1: UART 1-wire bus

On Thu, Dec 21, 2023 at 07:50:47AM +0100, Christoph Winklhofer wrote:
> Add device tree binding for UART 1-wire bus.
> 
> Signed-off-by: Christoph Winklhofer <cj.winklhofer@...il.com>
> ---
>  .../devicetree/bindings/w1/w1-uart.yaml       | 44 +++++++++++++++++++
>  1 file changed, 44 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/w1/w1-uart.yaml
> 
> diff --git a/Documentation/devicetree/bindings/w1/w1-uart.yaml b/Documentation/devicetree/bindings/w1/w1-uart.yaml
> new file mode 100644
> index 000000000000..93d83c42c407
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/w1/w1-uart.yaml
> @@ -0,0 +1,44 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/w1/w1-uart.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: UART 1-Wire Bus
> +
> +maintainers:
> +  - Christoph Winklhofer <cj.winklhofer@...il.com>
> +
> +description: |
> +  UART 1-wire bus. Utilizes the UART interface via the Serial Device Bus
> +  to create the 1-Wire timing patterns.
> +
> +  The UART peripheral must support full-duplex and operate in open-drain
> +  mode. The timing patterns are generated by a specific combination of
> +  baud-rate and transmitted byte, which corresponds to a 1-Wire read bit,
> +  write bit or reset pulse.
> +
> +  The default baud-rate for reset and presence detection is 9600 and for
> +  a 1-Wire read or write operation 115200. In case the actual baud-rate
> +  is different from the requested one, the transmitted byte is adapted
> +  to generate the 1-Wire timing patterns.
> +
> +  https://www.analog.com/en/technical-articles/using-a-uart-to-implement-a-1wire-bus-master.html
> +
> +
> +properties:
> +  compatible:
> +    const: w1-uart
> +
> +required:
> +  - compatible
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    serial {
> +      onewire {

Have you tried this in an actual DT? Assuming the UART node has a 
schema, it should be a warning because child node names are explicit in 
serial.yaml unfortunately. IOW, you need to add "onewire" to 
serial.yaml.


> +        compatible = "w1-uart";
> +      };
> +    };
> -- 
> 2.43.0
>