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Message-ID: <f31d929c-fa0a-4046-be05-38e92afa5d92@flygoat.com>
Date: Thu, 21 Dec 2023 22:27:33 +0000
From: Jiaxun Yang <jiaxun.yang@...goat.com>
To: Maxim Kochetkov <fido_max@...ox.ru>
Cc: linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
robh@...nel.org, mpe@...erman.id.au, aou@...s.berkeley.edu,
palmer@...belt.com, paul.walmsley@...ive.com, Conor Dooley
<conor@...nel.org>, hch@....de
Subject: Re: [PATCH 1/1] riscv: set ARCH_DMA_DEFAULT_COHERENT if
RISCV_DMA_NONCOHERENT is not set
在 2023/12/21 20:29, Conor Dooley 写道:
> + Christoph
>
> I don't think this patch is correct. Regardless of whether we support
> cache management operations, DMA is assumed to be coherent unless
> peripherals etc are specified to otherwise in DT (or however ACPI deals
> with that kind of thing).
>
> What problem are you trying to solve here?
>
> On Thu, Dec 21, 2023 at 09:51:52PM +0300, Maxim Kochetkov wrote:
>> Not all the RISCV are DMA coherent by default.
Sorry for chime in here.
IMO if your platform is not coherent by default, just insert
"dma-noncoherent"
at devicetree root node.
Thanks
- Jiaxun
> What is a "RISCV"? I believe this sentence should be "not all RISC-V
> systems are DMA coherent." but that is provided for by the
> "dma-noncoherent" property, set for peripherals (or buses) that are not
> DMA coherent.
>
>> Moreover we have
>> RISCV_DMA_NONCOHERENT option.
>> So set ARCH_DMA_DEFAULT_COHERENT only when RISCV_DMA_NONCOHERENT is not set
>>
>> Fixes: c00a60d6f4a1 ("of: address: always use dma_default_coherent for default coherency")
>> Signed-off-by: Maxim Kochetkov <fido_max@...ox.ru>
>> ---
>> arch/riscv/Kconfig | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
>> index d6824bec2c00..111c5d92d503 100644
>> --- a/arch/riscv/Kconfig
>> +++ b/arch/riscv/Kconfig
>> @@ -14,7 +14,7 @@ config RISCV
>> def_bool y
>> select ACPI_GENERIC_GSI if ACPI
>> select ACPI_REDUCED_HARDWARE_ONLY if ACPI
>> - select ARCH_DMA_DEFAULT_COHERENT
>> + select ARCH_DMA_DEFAULT_COHERENT if !RISCV_DMA_NONCOHERENT
> I think this is actually buggy, for things like distro kernels
> RISCV_DMA_COHERENT will always be set, but those kernels are expected
> to be used on systems that are cache coherent also.
>
> Thanks,
> Conor.
>
>> select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION
>> select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2
>> select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE
>> --
>> 2.40.1
>>
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@...ts.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv
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