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Message-ID: <CAKUZ0+GhB9m5c-5PtZNM3YrXmXfDRPVH_ZKAPxecF5dQO7Jdcw@mail.gmail.com>
Date: Fri, 22 Dec 2023 09:27:39 +0800
From: Jim Liu <jim.t90615@...il.com>
To: Andy Shevchenko <andy@...nel.org>
Cc: JJLIU0@...oton.com, KWLIU@...oton.com, linus.walleij@...aro.org,
brgl@...ev.pl, robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
conor+dt@...nel.org, linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, openbmc@...ts.ozlabs.org
Subject: Re: [PATCH v9 3/3] gpio: nuvoton: Add Nuvoton NPCM sgpio driver
Hi Andy
Thanks for your reply.
The description as below
> > > + in_port = GPIO_BANK(gpio->nin_sgpio);
> > > + if (GPIO_BIT(gpio->nin_sgpio) > 0)
> > > + in_port += 1;
> >
> > This is strange... So, you are telling that offsets start from 1 and not 0?
> >
> > > + out_port = GPIO_BANK(gpio->nout_sgpio);
> > > + if (GPIO_BIT(gpio->nout_sgpio) > 0)
> > > + out_port += 1;
> >
> > Ditto.
> >
> Yes, if the customer has defined the in/out pins the offsets start from 1.
>Why?
The NPCM_IOXCFG2_PORT default setting is to enable 0 input port and 0
output port.
The register default value is 0x0. Each port can support 8 pins.
If the register value is 0x31 means enable 3 output ports and 1 input port.
If customer has define nuvoton,input-ngpios or nuvoton,output-ngpios
dts property
For example , nuvoton,output-ngpios = <9>
> > > + out_port = GPIO_BANK(gpio->nout_sgpio);
The out_port value is 1 but one port only supports 8 pins.
> > > + if (GPIO_BIT(gpio->nout_sgpio) > 0)
> > > + out_port += 1;
This out_port value is 2, the driver will enable two port to support 9 pins.
Maybe it is my expression error , the out_port and in_port default value is 0.
> The NPCM_IOXCFG2_PORT register is the set number of in/out ports.
> NPCM_IOXCFG2_PORT register define as below:
> 0~3 bit is the number of input ports
> 4~7 bit is the number of output ports
> Each module can support 8 input ports and 8 output ports.
Best regards,
Jim
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