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Message-ID: <ZYV+zdm4fjYgATVW@alpha.franken.de>
Date: Fri, 22 Dec 2023 13:19:25 +0100
From: Thomas Bogendoerfer <tsbogend@...ha.franken.de>
To: Jiaxun Yang <jiaxun.yang@...goat.com>
Cc: linux-mips@...r.kernel.org, linux-kernel@...r.kernel.org,
gregory.clement@...tlin.com, vladimir.kondratiev@...el.com
Subject: Re: [PATCH v2 07/10] MIPS: traps: Handle CPU with non standard vint
offset
On Fri, Oct 27, 2023 at 11:11:03PM +0100, Jiaxun Yang wrote:
> Some BMIPS cpus has none standard start offset for vector interrupts.
>
> Handle those CPUs in vector size calculation and handler setup process.
hmm, I see no connection to what this series is fixing. How does it
work without this patch ?
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
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