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Message-Id: <20231227-mbly-clk-v2-0-a05db63c380f@bootlin.com>
Date: Wed, 27 Dec 2023 17:23:50 +0100
From: Théo Lebrun <theo.lebrun@...tlin.com>
To: Gregory CLEMENT <gregory.clement@...tlin.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>
Cc: Vladimir Kondratiev <vladimir.kondratiev@...ileye.com>,
linux-mips@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
Tawfik Bayouk <tawfik.bayouk@...ileye.com>,
Théo Lebrun <theo.lebrun@...tlin.com>
Subject: [PATCH v2 0/6] Add support for Mobileye EyeQ5 clock controller
Hi,
We replace fixed clocks as declared in the initial platform support
series [1] by read-only clocks exposed by the clock driver implemented
here. Write-ability is supported by the hardware but not implemented,
it could be added later-on if the need appears.
We expose ten PLLs that derive directly from the main crystal. Also, a
divider clock is exposed as a child clock of one of the PLLs.
The platform devicetree has many more clock nodes but those are
fixed-factors that are not hardware controllable; we therefore do not
deal with them.
This is V2. Full changelog below. Major changes are:
- Switch to a platform driver.
- Switch to declaring PLLs as fixed-factor.
- Point to the parent clk using the fw_name field in clk_parent_data.
- The above two points means we add support in fixed-factor to (1) allow
fixed accuracy rather than parent accuracy and (2) add new register
prototypes to point to the parent clk using fw_name.
[1]: https://lore.kernel.org/lkml/20231212163459.1923041-1-gregory.clement@bootlin.com/
Have a nice day,
Théo Lebrun
Signed-off-by: Théo Lebrun <theo.lebrun@...tlin.com>
---
Changes in v2:
- Drop [PATCH 1/5] that was taken by Stephen for clk-next.
- Add accuracy support to fixed-factor that is enabled with a flag.
Register prototypes were added to exploit this feature.
- Add fw_name support to fixed-factor. This allows pointing to parent
clocks using the value in `clock-names` in the DT. Register
prototypes were added for that.
- Bindings were modified to be less dumb: a binding was added for OLB
and the clock-controller is a child property of it. Removed the
possibility of pointing to OLB using a phandle. $nodename is the
generic `clock-controller` and not custom `clocks`. Fix dt-bindings
examples.
- Fix commit message for the driver patch. Add details, remove useless
fluff.
- Squash both driver commits together.
- Declare a platform_driver instead of using CLK_OF_DECLARE_DRIVER. This
also means using `dev_*` for logging, removing `pr_fmt`. We add a
pointer to device in the private structure.
- Use fixed-factor instead of fixed-rate for PLLs. We don't grab a
reference to the parent clk, instead using newly added fixed-factor
register prototypes and fwname.
- NULL is not an error when registering PLLs anymore.
- Now checking the return value of of_clk_add_hw_provider for errors.
- Fix includes.
- Remove defensive conditional at start of eq5c_pll_parse_registers.
- Rename clk_hw_to_ospi_priv to clk_to_priv to avoid confusion: it is
not part of the clk_hw_* family of symbols.
- Fix negative returns in eq5c_ospi_div_set_rate. It was a typo
highlighted by Stephen Boyd.
- Declare eq5c_ospi_div_ops as static.
- In devicetree, move the OLB node prior to the UARTs, as platform
device probe scheduling is dependent on devicetree ordering. This is
required to declare the driver as a platform driver, else it
CLK_OF_DECLARE_DRIVER is required.
- In device, create a core0-timer-clk fixed clock to feed to the GIC
timer. It requires a clock earlier than platform bus type init.
- Link to v1: https://lore.kernel.org/r/20231218-mbly-clk-v1-0-44ce54108f06@bootlin.com
---
Théo Lebrun (6):
clk: fixed-factor: add optional accuracy support
clk: fixed-factor: add fwname-based constructor functions
dt-bindings: soc: mobileye: add EyeQ5 OLB system controller
dt-bindings: clock: mobileye,eyeq5-clk: add bindings
clk: eyeq5: add platform driver
MIPS: mobileye: eyeq5: use OLB clocks controller
.../bindings/clock/mobileye,eyeq5-clk.yaml | 50 +++
.../bindings/soc/mobileye/mobileye,eyeq5-olb.yaml | 48 +++
MAINTAINERS | 4 +
.../{eyeq5-fixed-clocks.dtsi => eyeq5-clocks.dtsi} | 54 ++--
arch/mips/boot/dts/mobileye/eyeq5.dtsi | 23 +-
drivers/clk/Kconfig | 11 +
drivers/clk/Makefile | 1 +
drivers/clk/clk-eyeq5.c | 348 +++++++++++++++++++++
drivers/clk/clk-fixed-factor.c | 94 +++++-
include/dt-bindings/clock/mobileye,eyeq5-clk.h | 22 ++
include/linux/clk-provider.h | 26 +-
11 files changed, 621 insertions(+), 60 deletions(-)
---
base-commit: daf471f1ce94536da77948fac81d5c85ae12dbfa
change-id: 20231023-mbly-clk-87ce5c241f08
Best regards,
--
Théo Lebrun <theo.lebrun@...tlin.com>
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