lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <a2108be4-5f35-4625-9c80-e7d6db978bab@quicinc.com>
Date: Wed, 27 Dec 2023 07:48:14 +0530
From: Krishna Kurapati PSSNV <quic_kriskura@...cinc.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        Krzysztof Kozlowski
	<krzysztof.kozlowski+dt@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        "Konrad Dybcio" <konrad.dybcio@...aro.org>,
        Wesley Cheng
	<quic_wcheng@...cinc.com>,
        Johan Hovold <johan@...nel.org>,
        Bjorn Andersson
	<quic_bjorande@...cinc.com>
CC: <linux-usb@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        Conor Dooley
	<conor+dt@...nel.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
        Thinh Nguyen
	<Thinh.Nguyen@...opsys.com>, <quic_ppratap@...cinc.com>,
        <quic_jackp@...cinc.com>, Andy Gross <agross@...nel.org>
Subject: Re: [PATCH v5 1/2] dt-bindings: usb: dwc3: Clean up hs_phy_irq in
 binding



On 12/27/2023 12:34 AM, Krzysztof Kozlowski wrote:
> On 26/12/2023 16:03, Krishna Kurapati PSSNV wrote:
>>
>>
>> On 12/26/2023 5:52 PM, Krzysztof Kozlowski wrote:
>>
>>>>>
>>>>> This does not answer why, you sc8280xp and x1e80100 not get one optional
>>>>> interrupt. I asked "why" you are doing this change. Why do you need it?
>>>>> What is the rationale?
>>>>>
>>>>> Then I grunted about unmanageable commit, because all my troubles to
>>>>> review it are the effect of it: it is very difficult to read. It is also
>>>>> difficult for you, because you keep making here mistakes. So if you
>>>>> cannot write this commit properly and I cannot review it, then it is way
>>>>> over-complicated, don't you think? But this is still second problem
>>>>> here, don't ignore the fist - "why?"
>>>>
>>>> HI Krzysztof,
>>>>
>>>>     Thanks for the review.
>>>>     To answer the question,
>>>>
>>>> "why ?" : The interrupts have been mis-interpreted on many platforms or
>>>> many interrupts are missing.
>>>
>>> I asked about these two specific platforms. Please explain these
>>> changes. Above is so generic that tells me nothing.
>>>
>>
>> Is the question, "Why do x1e80100 and sc8280 don't have hs_phy_irq ?"
> 
>   No, not entirely, the question was why these have flexible number of
> IRQs (last one optional)?
> 
> 
>> If so, I checked the SC8280 HW specifics and I see one small error. The
>> name was printed wrong. I got it from another source. Will move sc8280
>> to list having 5 interrupts. As per x1e80100, I wasn't able to get my
>> hands on the hw specifics and I followed the following link by Abel Vesa:
>>
>> https://lore.kernel.org/r/20231214-x1e80100-usb-v1-1-c22be5c0109e@linaro.org
>>
>> As per the above patch, x1e80100 had only 4 interrupts.
> 
> Hm, ok, you say "4" but your patch says "minItems: 3". 3 != 4.
> 

Actually, you are right. We don't need the max/min items as we are sure 
that the targets mentioned under this have 4 interrupts definitively.

But the optional interrupt was put in just in case any target comes in 
that has no ss_phy and no hs_phy and has only the other 3 interrupts. 
Since those targets are not present currently, I will remove the max/min 
items from this.

Thanks for the catch. Sorry for bothering you with a couple of mails 
because I didn't understand the question you were trying to ask.

Regards,
Krishna,

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ