lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Date: Wed, 27 Dec 2023 10:52:02 +0800
From: Inochi Amaoto <inochiama@...look.com>
To: Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...nel.org>,
	Rob Herring <robh+dt@...nel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Chao Wei <chao.wei@...hgo.com>,
	Chen Wang <unicorn_wang@...look.com>,
	Paul Walmsley <paul.walmsley@...ive.com>,
	Palmer Dabbelt <palmer@...belt.com>,
	Albert Ou <aou@...s.berkeley.edu>,
	Inochi Amaoto <inochiama@...look.com>
Cc: linux-clk@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	linux-riscv@...ts.infradead.org
Subject: [PATCH v5 0/3] riscv: sophgo: add clock support for Sophgo CV1800 SoCs

Add clock controller support for the Sophgo CV1800B and CV1812H.

This patch follow this patch series:
https://lore.kernel.org/all/IA1PR20MB495399CAF2EEECC206ADA7ABBBD5A@IA1PR20MB4953.namprd20.prod.outlook.com/

Changed from v4:
1. improve code for patch 2
2. remove the already applied bindings
https://lore.kernel.org/all/IA1PR20MB49535E448097F6FFC1218C39BB90A@IA1PR20MB4953.namprd20.prod.outlook.com/

Changed from v3:
1. improve comment of patch 3
2. cleanup the include of patch 2

Changed from v2:
1. remove clock-names from bindings.
2. remove clock-frequency node of DT from previous patch.
3. change some unused clock to bypass mode to avoid unlockable PLL.

Changed from v1:
1. fix license issues.

Inochi Amaoto (3):
  clk: sophgo: Add CV1800 series clock controller driver
  riscv: dts: sophgo: add clock generator for Sophgo CV1800 series SoC
  riscv: dts: sophgo: add uart clock for Sophgo CV1800 series SoC

 arch/riscv/boot/dts/sophgo/cv1800b.dtsi |    4 +
 arch/riscv/boot/dts/sophgo/cv1812h.dtsi |    4 +
 arch/riscv/boot/dts/sophgo/cv18xx.dtsi  |   22 +-
 drivers/clk/Kconfig                     |    1 +
 drivers/clk/Makefile                    |    1 +
 drivers/clk/sophgo/Kconfig              |   12 +
 drivers/clk/sophgo/Makefile             |    7 +
 drivers/clk/sophgo/clk-cv1800.c         | 1530 +++++++++++++++++++++++
 drivers/clk/sophgo/clk-cv1800.h         |  123 ++
 drivers/clk/sophgo/clk-cv18xx-common.c  |   66 +
 drivers/clk/sophgo/clk-cv18xx-common.h  |   81 ++
 drivers/clk/sophgo/clk-cv18xx-ip.c      |  905 ++++++++++++++
 drivers/clk/sophgo/clk-cv18xx-ip.h      |  265 ++++
 drivers/clk/sophgo/clk-cv18xx-pll.c     |  425 +++++++
 drivers/clk/sophgo/clk-cv18xx-pll.h     |  119 ++
 15 files changed, 3560 insertions(+), 5 deletions(-)
 create mode 100644 drivers/clk/sophgo/Kconfig
 create mode 100644 drivers/clk/sophgo/Makefile
 create mode 100644 drivers/clk/sophgo/clk-cv1800.c
 create mode 100644 drivers/clk/sophgo/clk-cv1800.h
 create mode 100644 drivers/clk/sophgo/clk-cv18xx-common.c
 create mode 100644 drivers/clk/sophgo/clk-cv18xx-common.h
 create mode 100644 drivers/clk/sophgo/clk-cv18xx-ip.c
 create mode 100644 drivers/clk/sophgo/clk-cv18xx-ip.h
 create mode 100644 drivers/clk/sophgo/clk-cv18xx-pll.c
 create mode 100644 drivers/clk/sophgo/clk-cv18xx-pll.h

--
2.43.0


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ