lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Message-Id: <20231227-topic-8280_pcie-v1-3-095491baf9e4@linaro.org> Date: Wed, 27 Dec 2023 23:17:21 +0100 From: Konrad Dybcio <konrad.dybcio@...aro.org> To: Manivannan Sadhasivam <mani@...nel.org>, Bjorn Andersson <andersson@...nel.org>, Lorenzo Pieralisi <lpieralisi@...nel.org>, Krzysztof WilczyĆski <kw@...ux.com>, Rob Herring <robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>, Philipp Zabel <p.zabel@...gutronix.de>, Stanimir Varbanov <svarbanov@...sol.com>, Andrew Murray <amurray@...goodpenguin.co.uk>, Vinod Koul <vkoul@...nel.org> Cc: Marijn Suijten <marijn.suijten@...ainline.org>, linux-arm-msm@...r.kernel.org, linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org, Konrad Dybcio <konrad.dybcio@...aro.org> Subject: [PATCH 3/4] PCI: qcom: Read back PARF_LTSSM register To ensure write completion, read the PARF_LTSSM register after setting the LTSSM enable bit before polling for "link up". Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org> --- drivers/pci/controller/dwc/pcie-qcom.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index a02dc197c495..3d77269e70da 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -540,6 +540,7 @@ static void qcom_pcie_2_3_2_ltssm_enable(struct qcom_pcie *pcie) val = readl(pcie->parf + PARF_LTSSM); val |= LTSSM_EN; writel(val, pcie->parf + PARF_LTSSM); + readl(pcie->parf + PARF_LTSSM); } static int qcom_pcie_get_resources_2_3_2(struct qcom_pcie *pcie) -- 2.43.0
Powered by blists - more mailing lists