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Message-Id: <1703742157-69840-1-git-send-email-quic_qianyu@quicinc.com>
Date: Thu, 28 Dec 2023 13:42:35 +0800
From: Qiang Yu <quic_qianyu@...cinc.com>
To: agross@...nel.org, andersson@...nel.org, konrad.dybcio@...aro.org,
        vkoul@...nel.org, kishon@...nel.org
Cc: linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
        linux-kernel@...r.kernel.org, quic_cang@...cinc.com,
        quic_mrana@...cinc.com, quic_qianyu@...cinc.com
Subject: [PATCH 0/2] phy: qcom: qmp-pcie: Update PCIe PHY settings for SM8550

Align PCIe0/PCIe1 PHY settings with SM8550 latest PCIe PHY Hardware
Programming Guide.

Can Guo (1):
  phy: qcom: qmp-pcie: Update PCIe1 PHY settings for SM8550

Qiang Yu (1):
  phy: qcom: qmp-pcie: Update PCIe0 PHY settings for SM8550

 drivers/phy/qualcomm/phy-qcom-qmp-pcie.c             | 20 ++++++++++++++------
 drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v6.h      |  2 ++
 drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v6_20.h   |  2 ++
 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6_20.h        |  1 +
 .../phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v6_20.h   |  2 ++
 5 files changed, 21 insertions(+), 6 deletions(-)

-- 
2.7.4


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