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Message-ID: <20231228065322.1176351-4-yuklin.soo@starfivetech.com>
Date: Thu, 28 Dec 2023 14:53:22 +0800
From: Alex Soo <yuklin.soo@...rfivetech.com>
To: Ulf Hansson <ulf.hansson@...aro.org>, Adrian Hunter
<adrian.hunter@...el.com>, Yangtao Li <frank.li@...o.com>, Andy Shevchenko
<andriy.shevchenko@...ux.intel.com>, Linus Walleij
<linus.walleij@...aro.org>, Rob Herring <robh+dt@...nel.org>, "Krzysztof
Kozlowski" <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley
<conor+dt@...nel.org>, Emil Renner Berthing <kernel@...il.dk>
CC: <linux-mmc@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-riscv@...ts.infradead.org>, "Paul
Walmsley" <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>, Alex Soo <yuklin.soo@...rfivetech.com>
Subject: [PATCH 3/3] riscv: dts: starfive: jh8100: Add SD/eMMC device tree nodes
Add SD/eMMC device tree nodes.
Signed-off-by: Alex Soo <yuklin.soo@...rfivetech.com>
---
arch/riscv/boot/dts/starfive/jh8100.dtsi | 34 ++++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/arch/riscv/boot/dts/starfive/jh8100.dtsi b/arch/riscv/boot/dts/starfive/jh8100.dtsi
index 9c8ca73fffe0..545109ca6c49 100644
--- a/arch/riscv/boot/dts/starfive/jh8100.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh8100.dtsi
@@ -484,6 +484,15 @@ syscrg_sw: syscrg_sw@...20000 {
#reset-cells = <1>;
};
+ sd1: mmc@...40000 {
+ compatible = "starfive,jh8100-sd6hc", "cdns,sd6hc";
+ reg = <0x0 0x12740000 0x0 0x10000>;
+ interrupts = <91>;
+ bus-width = <4>;
+ cap-sd-highspeed;
+ status = "disabled";
+ };
+
pinctrl_gmac: pinctrl@...70000 {
compatible = "starfive,jh8100-sys-pinctrl-gmac",
"syscon", "simple-mfd";
@@ -509,6 +518,31 @@ uart6: serial@...e0000 {
status = "disabled";
};
+ emmc: mmc@...10000 {
+ compatible = "starfive,jh8100-sd6hc", "cdns,sd6hc";
+ reg = <0x0 0x1f110000 0x0 0x10000>;
+ interrupts = <174>;
+ clock-names = "main", "sdmclk";
+ clocks = <&aoncrg AONCRG_CLK_EMMC_ICG_EN>,
+ <&aoncrg AONCRG_CLK_EMMC_SDMCLK>;
+ resets = <&aoncrg AONCRG_RSTN_EMMC>;
+ bus-width = <8>;
+ status = "disabled";
+ };
+
+ sd0: mmc@...20000 {
+ compatible = "starfive,jh8100-sd6hc", "cdns,sd6hc";
+ reg = <0x0 0x1f120000 0x0 0x10000>;
+ interrupts = <175>;
+ clock-names = "main", "sdmclk";
+ clocks = <&aoncrg AONCRG_CLK_SDIO0_ICG_EN>,
+ <&aoncrg AONCRG_CLK_SDIO0_SDMCLK>;
+ resets = <&aoncrg AONCRG_RSTN_SDIO0>;
+ bus-width = <4>;
+ cap-sd-highspeed;
+ status = "disabled";
+ };
+
pinctrl_aon: pinctrl@...00000 {
compatible = "starfive,jh8100-aon-pinctrl",
"syscon", "simple-mfd";
--
2.25.1
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