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Message-ID: <BN9PR11MB5276126B3D950AA2F23520898C9EA@BN9PR11MB5276.namprd11.prod.outlook.com>
Date: Thu, 28 Dec 2023 08:10:58 +0000
From: "Tian, Kevin" <kevin.tian@...el.com>
To: Ethan Zhao <haifeng.zhao@...ux.intel.com>, "bhelgaas@...gle.com"
<bhelgaas@...gle.com>, "baolu.lu@...ux.intel.com" <baolu.lu@...ux.intel.com>,
"dwmw2@...radead.org" <dwmw2@...radead.org>, "will@...nel.org"
<will@...nel.org>, "robin.murphy@....com" <robin.murphy@....com>,
"lukas@...ner.de" <lukas@...ner.de>
CC: "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"iommu@...ts.linux.dev" <iommu@...ts.linux.dev>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [RFC PATCH v9 1/5] iommu/vt-d: add flush_target_dev member to
struct intel_iommu and pass device info to all ATS Invalidation functions
> From: Ethan Zhao <haifeng.zhao@...ux.intel.com>
> Sent: Thursday, December 28, 2023 8:17 AM
>
> @@ -181,6 +181,7 @@ static void __flush_svm_range_dev(struct intel_svm
> *svm,
>
> qi_flush_piotlb(sdev->iommu, sdev->did, svm->pasid, address, pages,
> ih);
> if (info->ats_enabled) {
> + info->iommu->flush_target_dev = info->dev;
> qi_flush_dev_iotlb_pasid(sdev->iommu, sdev->sid, info-
> >pfsid,
> svm->pasid, sdev->qdep, address,
> order_base_2(pages));
this is wrong both in concept and function.
an iommu instance can be shared by many devices which may all have
ongoing ATS invalidation requests to handle. Using a per-iommu field
to store the flush target is limiting (and there is no lock protection at all).
if there is a real need of passing dev pointer to qi helpers, just change
the helper to accept an explicit parameter.
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