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Message-Id: <20231228113245.174706-6-eugen.hristev@collabora.com>
Date: Thu, 28 Dec 2023 13:32:44 +0200
From: Eugen Hristev <eugen.hristev@...labora.com>
To: tiffany.lin@...iatek.com,
andrew-ct.chen@...iatek.com,
matthias.bgg@...il.com,
angelogioacchino.delregno@...labora.com,
linux-mediatek@...ts.infradead.org
Cc: eugen.hristev@...labora.com,
linux-media@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
robh+dt@...nel.org,
kernel@...labora.com
Subject: [PATCH v3 5/6] arm64: dts: mediatek: mt8186: fix VENC power domain clocks
The larb clock is in fact a subsys clock, so it must be prefixed by
'subsys-' to be correctly identified in the driver.
Fixes: d9e43c1e7a38 ("arm64: dts: mt8186: Add power domains controller")
Signed-off-by: Eugen Hristev <eugen.hristev@...labora.com>
---
Changes in v2,v3:
- none.
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index df0c04f2ba1d..66ead3f23336 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -1061,7 +1061,7 @@ power-domain@...186_POWER_DOMAIN_VENC {
reg = <MT8186_POWER_DOMAIN_VENC>;
clocks = <&topckgen CLK_TOP_VENC>,
<&vencsys CLK_VENC_CKE1_VENC>;
- clock-names = "venc0", "larb";
+ clock-names = "venc0", "subsys-larb";
mediatek,infracfg = <&infracfg_ao>;
#power-domain-cells = <0>;
};
--
2.34.1
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