linux-kernel - [PATCH] riscv: dts: sophgo: add watchdog dt node for CV1800

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Date: Thu, 28 Dec 2023 21:08:17 +0800
From: AnnanLiu <annan.liu.xdu@...look.com>
To: chao.wei@...hgo.com,
	unicorn_wang@...look.com,
	robh+dt@...nel.org,
	krzysztof.kozlowski+dt@...aro.org,
	conor+dt@...nel.org,
	paul.walmsley@...ive.com,
	palmer@...belt.com,
	aou@...s.berkeley.edu
Cc: devicetree@...r.kernel.org,
	linux-riscv@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	AnnanLiu <annan.liu.xdu@...look.com>
Subject: [PATCH] riscv: dts: sophgo: add watchdog dt node for CV1800

Add the watchdog device tree node to cv1800 SoC.
This patch depends on the clk driver and reset driver.
Clk driver link:
https://lore.kernel.org/all/IA1PR20MB49539CDAD9A268CBF6CA184BBB9FA@IA1PR20MB4953.namprd20.prod.outlook.com/
Reset driver link:
https://lore.kernel.org/all/20231113005503.2423-1-jszhang@kernel.org/

Signed-off-by: AnnanLiu <annan.liu.xdu@...look.com>
---
 arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts |  4 ++++
 arch/riscv/boot/dts/sophgo/cv1800b.dtsi          | 15 +++++++++++++++
 2 files changed, 19 insertions(+)

diff --git a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
index 3af9e34b3bc7..f3103de4a8cc 100644
--- a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
+++ b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
@@ -36,3 +36,7 @@ &osc {
 &uart0 {
 	status = "okay";
 };
+
+&watchdog0 {
+	status = "okay";
+};
diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
index aec6401a467b..a0a6b6fc6bc5 100644
--- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
 /*
  * Copyright (C) 2023 Jisheng Zhang <jszhang@...nel.org>
+ * Copyright (C) 2023 Annan Liu <annan.liu.xdu@...look.com>
  */
 
 #include <dt-bindings/interrupt-controller/irq.h>
@@ -103,6 +104,20 @@ uart4: serial@...0000 {
 			status = "disabled";
 		};
 
+		watchdog0: watchdog@...0000{
+			compatible = "snps,dw-wdt";
+			reg = <0x3010000 0x100>;
+			interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&pclk>;
+			resets = <&rst RST_WDT>;
+		};
+
+		pclk: pclk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <25000000>;
+		};
+
 		plic: interrupt-controller@...00000 {
 			compatible = "sophgo,cv1800b-plic", "thead,c900-plic";
 			reg = <0x70000000 0x4000000>;
-- 
2.34.1