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Message-ID: <mhng-bc357c81-f43a-40e2-b4ac-f9c462e4c006@palmer-ri-x1c9a> Date: Thu, 28 Dec 2023 17:44:50 -0800 (PST) From: Palmer Dabbelt <palmer@...belt.com> To: Atish Patra <atishp@...osinc.com> CC: linux-kernel@...r.kernel.org, Atish Patra <atishp@...osinc.com>, anup@...infault.org, aou@...s.berkeley.edu, alexghiti@...osinc.com, ajones@...tanamicro.com, atishp@...shpatra.org, Conor Dooley <conor.dooley@...rochip.com>, guoren@...nel.org, uwu@...nowy.me, kvm-riscv@...ts.infradead.org, kvm@...r.kernel.org, linux-riscv@...ts.infradead.org, Mark Rutland <mark.rutland@....com>, Paul Walmsley <paul.walmsley@...ive.com>, Will Deacon <will@...nel.org> Subject: Re: [v1 04/10] RISC-V: Add SBI PMU snapshot definitions On Mon, 18 Dec 2023 02:41:01 PST (-0800), Atish Patra wrote: > SBI PMU Snapshot function optimizes the number of traps to > higher privilege mode by leveraging a shared memory between the S/VS-mode > and the M/HS mode. Add the definitions for that extension and new error > codes. > > Reviewed-by: Anup Patel <anup@...infault.org> > Signed-off-by: Atish Patra <atishp@...osinc.com> > --- > arch/riscv/include/asm/sbi.h | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h > index f3eeca79a02d..a24bc4fa34ff 100644 > --- a/arch/riscv/include/asm/sbi.h > +++ b/arch/riscv/include/asm/sbi.h > @@ -122,6 +122,7 @@ enum sbi_ext_pmu_fid { > SBI_EXT_PMU_COUNTER_STOP, > SBI_EXT_PMU_COUNTER_FW_READ, > SBI_EXT_PMU_COUNTER_FW_READ_HI, > + SBI_EXT_PMU_SNAPSHOT_SET_SHMEM, > }; > > union sbi_pmu_ctr_info { > @@ -138,6 +139,13 @@ union sbi_pmu_ctr_info { > }; > }; > > +/* Data structure to contain the pmu snapshot data */ > +struct riscv_pmu_snapshot_data { > + uint64_t ctr_overflow_mask; > + uint64_t ctr_values[64]; > + uint64_t reserved[447]; > +}; > + > #define RISCV_PMU_RAW_EVENT_MASK GENMASK_ULL(47, 0) > #define RISCV_PMU_RAW_EVENT_IDX 0x20000 > > @@ -234,9 +242,11 @@ enum sbi_pmu_ctr_type { > > /* Flags defined for counter start function */ > #define SBI_PMU_START_FLAG_SET_INIT_VALUE (1 << 0) > +#define SBI_PMU_START_FLAG_INIT_FROM_SNAPSHOT BIT(1) > > /* Flags defined for counter stop function */ > #define SBI_PMU_STOP_FLAG_RESET (1 << 0) > +#define SBI_PMU_STOP_FLAG_TAKE_SNAPSHOT BIT(1) > > enum sbi_ext_dbcn_fid { > SBI_EXT_DBCN_CONSOLE_WRITE = 0, > @@ -259,6 +269,7 @@ enum sbi_ext_dbcn_fid { > #define SBI_ERR_ALREADY_AVAILABLE -6 > #define SBI_ERR_ALREADY_STARTED -7 > #define SBI_ERR_ALREADY_STOPPED -8 > +#define SBI_ERR_NO_SHMEM -9 > > extern unsigned long sbi_spec_version; > struct sbiret { Acked-by: Palmer Dabbelt <palmer@...osinc.com>
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